參數(shù)資料
型號(hào)： OPA685N
英文描述： Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER With Disable TM
中文描述： 超寬帶，電流反饋運(yùn)算放大器商標(biāo)使用禁用
文件頁(yè)數(shù)： 24/28頁(yè)
文件大小： 283K
代理商： OPA685N
24
OPA685
OUTPUT CURRENT AND VOLTAGE
The OPA685 provides output voltage and current capabili-
ties that are consistent with driving doubly-terminated 50
lines. For a 100
load at the gain of +8 (see Figure 1), the
total load is the parallel combination of the 100
load and
the 456
total feedback network impedance. This 82
load
will require no more than 40mA output current to support
the
±
3.3V minimum output voltage swing specified for
100
loads. This is well under the minimum +90/–60mA
guaranteed specifications.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage
current or V-I product,
which is more relevant to circuit operation. Refer to the
“Output Voltage and Current Limitations” plot in the Typi-
cal Performance Curves. The X and Y axes of this graph
show the zero-voltage output current limit and the zero-
current output voltage limit, respectively. The four quad-
rants provide a more detailed view of the OPA685’s output
drive capabilities. Superimposing resistor load lines onto the
plot shows the available output voltage and current for
specific loads.
The minimum specified output voltage and current over-
temperature are set by worst-case simulations at the cold
temperature extreme. Only at cold startup will the output
current and voltage decrease to the numbers shown in the
guaranteed tables. As the output transistors deliver power,
their junction temperatures will increase, decreasing their
V
BE
s (increasing the available output voltage swing) and
increasing their current gains (increasing the available out-
put current). In steady-state operation, the available output
voltage and current will always be greater than that shown
in the over-temperature specifications since the output stage
junction temperatures will be higher than the minimum
specified operating ambient.
To maintain maximum output stage linearity, no output
short-circuit protection is provided. This will not normally
be a problem since most applications include a series match-
ing resistor at the output that will limit the internal power
dissipation if the output side of this resistor is shorted to
ground. However, shorting the output pin directly to the
adjacent positive power supply pin will, in most cases,
destroy the amplifier. If additional short-circuit protection is
required, consider a small series resistor in the power supply
leads. This will, under heavy output loads, reduce the
available output voltage swing. A 5
series resistor in each
power supply lead will limit the internal power dissipation
to less than 1W for an output short circuit while decreasing
the available output voltage swing only 0.25V for up to
50mA desired load currents. Always place the 0.1
μ
F power
supply decoupling capacitors directly on the supply pins
after these supply current-limiting resistors.
DRIVING CAPACITIVE LOADS
One of the most demanding, and yet very common, load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an A/D converter—including
additional external capacitance which may be recommended
to improve A/D linearity. A high speed, high open-loop gain
amplifier like the OPA685 can be very susceptible to de-
creased stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin. When
the amplifier’s open-loop output resistance is considered,
this capacitive load introduces an additional pole in the
signal path that can decrease the phase margin. Several
external solutions to this problem have been suggested.
When the primary considerations are frequency response
flatness, pulse response fidelity and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive
load. This does not eliminate the pole from the loop re-
sponse, but rather shifts it and adds a zero at a higher
frequency. The additional zero acts to cancel the phase lag
from the capacitive load pole, thus increasing the phase
margin and improving stability.
The Typical Performance Curves show the recommended
R
S
versus capacitive load and the resulting frequency re-
sponse at the load. Parasitic capacitive loads greater than
2pF can begin to degrade the performance of the OPA685.
Long PC board traces, unmatched cables, and connections to
multiple devices can easily cause this value to be exceeded.
Always consider this effect carefully and add the recom-
mended series resistor as close as possible to the OPA685
output pin (see Board Layout Guidelines).
DISTORTION PERFORMANCE
The OPA685 provides good distortion performance into a
100
load on
±
5V supplies. Relative to alternative solu-
tions, the OPA685 holds much lower distortion at higher
frequencies (> 20MHz) than alternative solutions. Gener-
ally, until the fundamental signal reaches very high fre-
quency or power levels, the 2nd harmonic will dominate the
distortion with a negligible 3rd harmonic component. Focus-
ing then on the 2nd harmonic, increasing the load impedance
improves distortion directly. Remember, the total load in-
cludes the feedback network. In the non-inverting configu-
ration (Figure 1), this is the sum of R
F
+ R
G
, while in the
inverting configuration, it is just R
F
. Also, providing an
additional supply decoupling capacitor (0.1
μ
F) between the
supply pins (for bipolar operation) improves the 2nd order
distortion slightly (3dB to 6dB).
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OPA686 制造商:BB 制造商全稱:BB 功能描述:Wideband, Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER
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