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參數(shù)資料
| 型號(hào)： | NCP1094MNRG |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC INTERFACE CTLR POE-PD 10-DFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | HIPO™ |
| 控制器類型： | PoE-PD 接口 |
| 接口： | IEEE 802.3af |
| 電流 - 電源： | 500mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-VFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-DFN-EP（3x3） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | NCP1094MNRGOSDKR |
NCP1093, NCP1094
http://onsemi.com
9
NCP109x
Rclass
Rinrush
RTN
VPORTN
CLASS
INRUSH
VPORTP
DET
Cpd
PGOOD
DCDC Converter
Controller
VSS
VDD
OVLO
UVLO
GATE
Rdet
Figure 8. Power GOOD Implementation
NCP103x
NCLASS_AT Dual Event Classification Indicator
The nCLASS AT active low open drain output pin should
be used to notify to the microprocessor of the Powered
Device that the PSE did a one or two event Hardware
Classification.
If a 2 event Hardware classification has been done and
once the PD application power has been applied, the
nCLASS_AT will be pulled low to RTN (ground connection
of the DC/DC controller converter).
Otherwise, nCLASS_AT will be in high impedance mode.
The following Scheme illustrates how the nCLass_AT pin
may be configured with the processor of the Powered
Device. An optocoupler is here used to guarantee to the full
isolation between the cable and the application.
NCP 1094
Cl
in
e
Rclass
Rinrush
Z
_line
RTN
VPORTN
nCLASS _AT
CLASS
INRUSH
AUX
VPORTP
DET
Cpd
PGOOD
DC DC Converter
Controller
VSS
VDD
OVLO
UVLO
GATE
Powered
Application
VBIAS
Type 2PSE
VSUP
VNEG
To
VAUX
Rdet
Figure 9. nClass AT indicator / possible implementation with the Powered Device
As soon as the application is powered by the DC/DC and
after its initialization, the microprocessor will check if the
PD interface detected a 2 event hardware classification by
reading its digital input (IN1 in this example). If this IN1 pin
is low, the application knows that the type 2 PSE, and
therefore it can consume power till the level specified by the
IEEE802.3at standard. Otherwise the application will have
to perform a Layer 2 classification with the PSE.
Hereafter are described several scenarios for which the
NCP109x will not enable its nCLASS_AT pin during the
Powered Mode:
The PSE skipped the classification phase
The PSE did a 1 event hardware classification (it
can be a type 1 PSE or a type 2 PSE with Layer 2
only)
The PSE did a 2 event hardware classification but it
didn’t well control the input voltage in the Mark
voltage (it crossed the Reset range for example).
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