參數(shù)資料
型號: NAND512R4A2CZD6E
廠商: NUMONYX
元件分類: PROM
英文描述: 32M X 16 FLASH 1.8V PROM, 15000 ns, PBGA55
封裝: 8 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFBGA-55
文件頁數(shù): 19/55頁
文件大?。?/td> 1377K
代理商: NAND512R4A2CZD6E
Device operations
NAND512-A2C
6.4
Copy back program
The copy back program operation is used to copy the data stored in one page and
reprogram it in another page.
The copy back program operation does not require external memory and so the operation is
faster and more efficient because the reading and loading cycles are not required. The
operation is particularly useful when a portion of a block is updated and the rest of the block
needs to be copied to the newly assigned block.
If the copy back program operation fails an error is signalled in the status register. However
as the standard external ECC cannot be used with the copy back operation bit error due to
charge loss cannot be detected. For this reason it is recommended to limit the number of
copy back operations on the same data and or to improve the performance of the ECC.
The copy back program operation requires two steps:
1.
The source page must be read using the Read A command (one bus write cycle to
setup the command and then 4 bus write cycles to input the source page address).
This operation copies all 264 words/ 528 bytes from the page into the page buffer
2.
When the device returns to the ready state (Ready/Busy High), the second bus write
cycle of the command is given with the 4 bus cycles to input the target page address.
Refer to Table 10 for the addresses that must be the same for the source and target
pages
3.
The Program Confirm command (code 10h) is no more necessary on NAND512-A2C
devices. It is optional and has been maintained for backward compatibility.
After a copy back program operation, a partial-page program is not allowed in the target
page until the block has been erased.
See Figure 14 for an example of the copy back operation.
Figure 14.
Copy back operation
1.
The Program Confirm command (code 10h) is no more necessary on NAND512-A2C devices. It is optional and has been
maintained for backward compatibility.
Table 10.
Copy back program addresses
Density
Same address for source and target pages
512 Mbits
A25
I/O
RB
Source
Address Inputs
SR0
ai13187
8Ah
70h
00h
Copy Back
Code
Read
Code
Read Status Register
Target
Address Inputs
tBLBH1
(Read Busy time)
10h(1)
Busy
tBLBH2
(Program Busy time)
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