參數(shù)資料
型號: MVTX2803AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Unmanaged 8-Port 1000 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA596
封裝: 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596
文件頁數(shù): 78/127頁
文件大?。?/td> 1706K
代理商: MVTX2803AG
MVTX2803
Data Sheet
78
Zarlink Semiconductor Inc.
10.6.130 QOSC6E – CREDIT_C3_G7
Serial Interface Address: h585
10.6.131 QOSC6F – CREDIT_C4_G7
Serial Interface Address: h586
10.6.132 QOSC70 – CREDIT_C5_G7
Serial Interface Address: h587
10.6.133 QOSC71– CREDIT_C6_G7
Serial Interface Address: h588
10.6.134 QOSC72– CREDIT_C7_G7
Serial Interface Address: h589
QOSC6B through QOSC72 represents the set of WFQ parameters (see section 7.5) for Gigabit port 7. The
granularity of the numbers (bits [5:0]) is 1, and their sum must be 64. QOSC6B corresponds to W0, and
QOSC72 corresponds to W7.
Class 6 Shaper Control Port G0
10.6.135 QOSC73 – TOKEN_RATE_G0
Serial Interface Address: h58A
Bits [5:0]
W3 - Credit register.
(Default 4’h04)
Bits [7:6]:
Reserved
Bits [5:0]
W4 - Credit register.
(Default 4’h04)
Bits [7:6]:
Reserved
Bits [5:0]
W5 - Credit register.
(Default 5’h8)
Bits [7:6]:
Reserved
Bits [5:0]
W6 - Credit register.
(Default 5’h8)
Bits [5:0]
W7 - Credit register.
(Default 5’h10)
Bits [7:6]:
Reserved
Bits [7:0]
Bytes allow to transmit every frame time (0.512usec) when regulated by Shaper logic.
(Default: 8’h08)
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