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參數(shù)資料
| 型號： | MVTX2803AG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | Unmanaged 8-Port 1000 Mbps Ethernet Switch |
| 中文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA596 |
| 封裝： | 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596 |
| 文件頁數(shù)： | 16/127頁 |
| 文件大?。?/td> | 1706K |
| 代理商： | MVTX2803AG |
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MVTX2803
Data Sheet
16
Zarlink Semiconductor Inc.
4.0 Memory Interface
4.1 Overview
Figure 3 illustrates the first part of the ZBT-SRAM interface for the MVTX2803AG. As shown, two ZBT-SRAM
banks, A and B, are used, with a 64-bit bus connected to each. Each DMA can read and write from both bank
A and bank B. During each tick, two memory operations will take place in parallel – one for bank A, and one for
bank B. Because the clock frequency is 133 MHz, the total memory bandwidth is 128 bits
×
133 MHz = 17
Gbps, for frame data buffer (FDB) access.
In addition, the figure shows that the 8 Gigabit ports are actually grouped into sets of 4. If TxDMA 0 is using
bank B during a given memory slot, then TxDMA’s 1-3 will never be using bank A during this same slot. As a
result, TxDMA’s 0-3 can share the same bank selector.
Figure 3 - MVTX2803AG SRAM Interface Block Diagram (DMAs for Gigabit Ports)
4.2 Detailed Memory Information
Because the bus for each bank is 64 bits wide, frames are broken into 8-byte granules, written to and read from
memory. The first 8-byte granule gets written to Bank A, the second 8-byte granule gets written to Bank B, and
so on in alternating fashion. When reading frames from memory, the same procedure is followed, first from A,
then from B, and so on.
The reading and writing from alternating memory banks can be performed with minimal waste of memory
bandwidth. For any speed port, in the worst case, a 1-byte-long EOF granule gets written to Bank A. This
means that a 7-byte segment of Bank A bandwidth is idle, and furthermore, the next 8-byte segment of Bank B
bandwidth is idle, because the first 8 bytes of the next frame will be written to Bank A, not B. This scenario
results in a maximum 15 bytes of waste per frame, which is always acceptable because the interframe gap is 20
bytes.
Search engine data is written to both banks in parallel. In this way, a search engine read operation could be
performed by either bank at any time without a problem.
ZBT-SRAM Bank A
ZBT-SRAM Bank B
TxDMA
0-1
TxDMA
2-3
TxDMA
4-5
TxDMA
6-7
RxDMA
0-1
RxDMA
2-3
RxDMA
4-5
RxDMA
6-7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MVTX2803AG2 | 制造商:Microsemi Corporation 功能描述: |
| MVTX2804 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8-Port 1000 Mbps Ethernet Distributed Switch |
| MVTX2804AG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8-Port 1000 Mbps Ethernet Distributed Switch |
| MVTX2804AG2 | 制造商:Microsemi Corporation 功能描述: |
| MVU10-10FBK | 功能描述:端子 D-10-1103K BS-33-10-P 85299 RoHS:否 制造商:AVX 產(chǎn)品:Junction Box - Wire to Wire 系列:9826 線規(guī):26-18 接線柱/接頭大小: 絕緣: 顏色:Red 型式:Female 觸點電鍍:Tin over Nickel 觸點材料:Beryllium Copper, Phosphor Bronze 端接類型:Crimp |
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