參數(shù)資料
型號: MVTX2802AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Managed 4-Port 1000 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA596
封裝: 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596
文件頁數(shù): 20/154頁
文件大?。?/td> 1936K
代理商: MVTX2802AG
MVTX2802
Data Sheet
20
Zarlink Semiconductor Inc.
2.6.2 Read Command
All registers in the MVTX2802AG can be modified through this synchronous serial interface.
3.0 Data Forwarding Protocol
3.1 Unicast Data Frame Forwarding
When a frame arrives, it is assigned a handle in memory by the Frame Control Buffer Manager (FCB Manager).
An FCB handle will always be available, because of advance buffer reservations.
The memory (ZBT-SRAM) interface is a 64-bit bus, connected to a ZBT-SRAM domain. The Receive DMA
(RxDMA) is responsible for multiplexing the data and the address. On a port’s “turn,” the RxDMA will move 8
bytes (or up to the end-of-frame) from the port’s associated RxFIFO into memory (Frame Data Buffer, or FDB).
Once an entire frame has been moved to the FDB, and a good end-of-frame (EOF) has been received, the Rx
interface makes a switch request. The RxDMA arbitrates among multiple switch requests.
The switch request consists of the first 64 bytes of a frame, containing among other things, the source and
destination MAC addresses of the frame. The search engine places a switch response in the switch response
queue of the frame engine when done. Among other information, the search engine will have resolved the
destination port of the frame and will have determined that the frame is unicast.
After processing the switch response, the Transmission Queue Manager (TxQ manager) of the frame engine is
responsible for notifying the destination port that it has a frame to forward to it. But first, the TxQ manager has
to decide whether or not to drop the frame, based on global FDB reservations and usage, as well as TxQ
occupancy at the destination. If the frame is not dropped, then the TxQ manager links the frame’s FCB to the
correct per-port-per-class TxQ. Unicast TxQ’s are linked lists of transmission jobs, represented by their
associated frames’ FCB’s. There is one linked list for each transmission class for each port. There are 8 classes
for each of the 4 Gigabit ports – a total of 32 unicast queues.
The TxQ manager is responsible for scheduling transmission among the queues representing different classes
for a port. When the port control module determines that there is room in the MAC Transmission FIFO (TxFIFO)
for another frame, it requests the handle of a new frame from the TxQ manager. The TxQ manager chooses
among the head-of-line (HOL) frames from the per-class queues for that port, using a Zarlink Semiconductor
scheduling algorithm.
As at the transmit end, each of the 4 ports has time slots devoted solely to reading data from memory at the
address calculated by port control. The Transmission DMA (TxDMA) is responsible for multiplexing the data and
the address. On a port’s turn, the TxDMA will move 8 bytes (or up to the EOF) from memory into the port’s
associated TxFIFO. After reading the EOF, the port control requests a FCB release for that frame. The TxDMA
arbitrates among multiple buffer release requests.
The frame is transmitted from the TxFIFO to the line.
PS_STROBE-
PS_DI
PS_DO
A0
A1
A2
...
A9
A10
A11
R
D0
D1
D2
D3
D4
D5
D6
D7
START
ADDRESS
COMMAND
DATA
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MVTX2803A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 8 port Gigabit Ethernet switch
MVTX2803AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 8-Port 1000 Mbps Ethernet Switch
MVTX2803AG2 制造商:Microsemi Corporation 功能描述:
MVTX2804 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8-Port 1000 Mbps Ethernet Distributed Switch