參數(shù)資料
型號： MT90883
廠商： Zarlink Semiconductor Inc.
英文描述： TDM to Packet Processors
中文描述： TDM到分組處理器
文件頁數(shù)： 71/97頁
文件大?。?/td> 702K
代理商： MT90883
MT90880/1/2/3
Data Sheet
71
Zarlink Semiconductor Inc.
6.10.6 Open Drain Circuitry
The MT9088x signals pci_serr# and pci_inta# do not behave as open drain. Signals pci_serr# and pci_inta# should
behave as open drain. The following external circuitry should be used, so that the board on which the MT9088x is
placed, is compliant with the PCI specifications. Note any other circuitry such as termination resistors, pull-up
resistors, etc. are not shown.
Figure 31 - pci_serr#, pci_inta# Open Drain Circuitry
6.11 DMA Controller
The MT9088x contains a DMA Controller, automating transfer of data packets between the CPU system
memory and the MT9088x's external packet memory (Figure 32). This can be used to send packets from the
CPU into the packet network, and to direct packets received from the network to the CPU.
Figure 32 - DMA Transfer to/from System Memory
pci_inta#
(AF19)
pci_serr#
(AB24)
Quad
Open
Drain
Buffer
VDD33
MT9088x
to
PCI Backplane
(3.3V)
MT90880
External packet
memory
Host CPU
System
memory
PCI Bus
PCI
Bridge
DMA transfer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90883A 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883A/IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883BP1N 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT9088IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
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