參數(shù)資料
型號： MT48LC4M32LFFC
廠商： Micron Technology, Inc.
英文描述： SYNCHRONOUS DRAM
中文描述： 同步DRAM
文件頁數(shù)： 35/52頁
文件大?。?/td> 1281K
代理商： MT48LC4M32LFFC
35
128Mb: x32 SDRAM
128MbSDRAMx32_D.p65 – Rev. D; Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x32
SDRAM
INITIALIZE AND LOAD MODE REGISTER
*CAS latency indicated in parentheses.
NOTE:
1. The Mode Register may be loaded prior to the AUTO REFRESH cycles if desired.
2. Outputs are guaranteed High-Z after command is issued.
-6
-7
SYMBOL*
t
CKH
t
CKS
t
CMH
t
CMS
t
MRD
t
RFC
t
RP
MIN
1
1.5
1
1.5
2
60
18
MAX
MIN
1
2
1
2
2
70
20
MAX
UNITS
ns
ns
ns
ns
t
CK
ns
ns
TIMING PARAMETERS
-6
-7
SYMBOL*
t
AH
t
AS
t
CH
t
CL
t
CLK (3)
t
CLK (2)
t
CLK (1)
MIN
1
1.5
2.5
2.5
6
10
20
MAX
MIN
1
2
2.75
2.75
7
10
20
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
tCH
tCL
tCK
CKE
CLK
COMMAND
DQ
BA0, BA1
BANK
tRFC
tMRD
tRFC
AUTO REFRESH
AUTO REFRESH
Program Mode Register
1, 2
tCMH
tCMS
Precharge
all banks
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
tRP
(
)
(
)
(
)
(
)
tCKS
Power-up:
V
DD
and
CK stable
T = 100μs
(MIN)
PRECHARGE
NOP
RAUTO
NOP
LREGISTER
ACTIVE
NOP
NOP
NOP
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
RAUTO
ALL
BANKS
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
High-Z
tCKH
(
)
(
)
(
)
(
)
DQM 0-3
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
()()
()()
()()
()()
()()
NOP
(
)
(
)
(
)
(
)
tCMH
tCMS
tCMH
tCMS
A0-A9, A11
ROW
tAH
tAS
CODE
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
A10
ROW
tAH
tAS
CODE
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
ALL BANKS
SINGLE BANK
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
DON’T CARE
UNDEFINED
T0
T1
Tn + 1
To + 1
Tp + 1
Tp + 2
Tp + 3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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