參數(shù)資料
型號(hào)： MT48LC4M32LFFC
廠商： Micron Technology, Inc.
英文描述： SYNCHRONOUS DRAM
中文描述： 同步DRAM
文件頁(yè)數(shù)： 33/52頁(yè)
文件大?。?/td> 1281K
代理商： MT48LC4M32LFFC
33
128Mb: x32 SDRAM
128MbSDRAMx32_D.p65 – Rev. D; Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x32
SDRAM
AC FUNCTIONAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 11; notes appear on page 34)
PARAMETER
READ/WRITE command to READ/WRITE command
CKE to clock disable or power-down entry mode
CKE to clock enable or power-down exit setup mode
DQM to input data delay
DQM to data mask during WRITEs
DQM to data high-impedance during READs
WRITE command to input data delay
Data-in to ACTIVE command
SYMBOL
t
CCD
t
CKED
t
PED
t
DQD
t
DQM
t
DQZ
t
DWD
t
DAL (3)
t
DAL (2)
t
DAL (1)
t
DPL
t
BDL
t
CDL
t
RDL
t
MRD
t
ROH (3)
t
ROH (2)
t
ROH (1)
-6
1
1
1
0
0
2
0
5
4
3
2
1
1
2
2
3
2
1
-7
1
1
1
0
0
2
0
5
4
3
2
1
1
2
2
3
2
1
UNITS NOTES
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
17
14
14
17
17
17
17
CL = 3
CL = 2
CL = 1
15, 21
15, 21
15, 21
16, 21
17
17
16, 21
26
17
17
17
Data-in to PRECHARGE command
Last data-in to burst STOP command
Last data-in to new READ/WRITE command
Last data-in to PRECHARGE command
LOAD MODE REGISTER command to ACTIVE or REFRESH command
Data-out to high-impedance from PRECHARGE command
CL = 3
CL = 2
CL = 1
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