參數(shù)資料
型號(hào)： MT46V64M8TG-75ZL
廠商： Micron Technology, Inc.
英文描述： DOUBLE DATA RATE DDR SDRAM
中文描述： 雙倍數(shù)據(jù)速率的DDR SDRAM內(nèi)存
文件頁(yè)數(shù)： 32/68頁(yè)
文件大小： 2555K
代理商： MT46V64M8TG-75ZL
32
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_B.p65
–
Rev. B; Pub 4/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
512Mb: x4, x8, x16
DDR SDRAM
ADVANCE
Figure 20
WRITE to READ – Interrupting
t
DQSS (NOM)
CK
CK#
COMMAND
WRITE
NOP
NOP
NOP
NOP
NOP
ADDRESS
Bank
a
,
Col
b
Bank
a
,
Col
n
READ
T0
T1
T2
T3
T2n
T4
T5
T5n
NOTE
: 1. DI
b
= data-in for column
b
.
2. An interrupted burst of 4 or 8 is shown; two data elements are written.
3. One subsequent element of data-in is applied in the programmed order following DI
b
.
4.tWTR is referenced from the first positive CK edge after the last data-in pair.
5. A10 is LOW with the WRITE command (auto precharge is disabled).
6. DQS is required at T2 and T2n (nominal case) to register DM.
7. If the burst of 8 was used, DM would not be required at T3 -T4n because the READ command would
mask the last two data elements.
T1n
T6
T6n
t
WTR
CL = 2
DQ
DQS
DM
DI
b
DI
n
t
DQSS (MIN)
CL = 2
DQ
DQS
DM
DI
b
t
DQSS (MAX)
CL = 2
DQ
DQS
DM
DI
b
DI
n
DI
n
DON
’
T CARE
TRANSITIONING DATA
t
DQSS
t
DQSS
t
DQSS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT46V64M8TG-8 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM
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