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| 型號： | MT46V64M8TG-75L |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DOUBLE DATA RATE DDR SDRAM |
| 中文描述： | 雙倍數(shù)據(jù)速率的DDR SDRAM內(nèi)存 |
| 文件頁數(shù)： | 52/68頁 |
| 文件大小： | 2555K |
| 代理商： | MT46V64M8TG-75L |
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52
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_B.p65
–
Rev. B; Pub 4/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
512Mb: x4, x8, x16
DDR SDRAM
ADVANCE
NOTES (continued)
33. The clock is allowed up to ±150ps of jitter. Each
timing parameter is allowed to vary by the same
amount.
34.
t
HPmin is the lesser of
t
CL minimum and
t
CH
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
35. READs and WRITEs with autoprecharge are not
allowed to be issued until
t
RAS(
MIN
) can be
satisfied prior to the internal precharge com-
mand being issued.
36. Any positive glitch must be less than
1
/
3
of the
clock cycle and not more than +400mV or 2.9
volts, whichever is less. Any negative glitch must
be less than
1
/
3
of the clock cycle and not exceed
either -300mV or 2.2 volts, whichever is more
positive.
37. Normal Output Drive Curves:
a)The full variation in driver pull-down current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure A.
b)The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure A.
c) The full variation in driver pull-up current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure B.
d)The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figure B.
e)The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
should be between .71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0 Volt,
and at the same voltage and temperature.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±10%, for device drain-to-source voltages from
0.1V to 1.0 volt.
38.Reduced Output Drive Curves:
a) The full variation in driver pull-down current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure C.
b) The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure C.
c) The full variation in driver pull-up current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure D.
d) The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figure D.
e) The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
should be between .71 and 1.4 for device
drain-to-source voltages from 0.1V to 1.0 Volt,
and at the same voltage and temperature.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±10%, for device drain-to-source voltages from
0.1V to 1.0 Volt.
Figure A
Pull-Down Characteristics
0
20
40
60
80
100
120
140
160
0.0
0.5
1.0
1.5
2.0
2.5
V
OUT
(V)
I
O
Figure B
Pull-Up Characteristics
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
0.0
0.5
1.0
1.5
2.0
2.5
V
DD
Q - V
OUT
(V)
I
O
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT46V64M8TG-75Z | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V64M8TG-75ZL | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V64M8TG-8 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
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