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參數(shù)資料
| 型號(hào)： | MPC92432FAR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 1360 MHz, OTHER CLOCK GENERATOR, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁(yè)數(shù)： | 18/20頁(yè) |
| 文件大小： | 412K |
| 代理商： | MPC92432FAR2 |
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Advanced Clock Drivers Devices
Freescale Semiconductor
7
MPC92432
Table 6. AC Characteristics (VCC = 3.3 V ± 5%, TJ = –40°C to +85°C)(1)
1. AC characteristics apply for parallel output termination of 50
to VTT.
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fXTAL
Crystal Interface Frequency Range
15
16
20
MHz
fREF
FREF_EXT Reference Frequency Range
15
20
MHz
fVCO
VCO Frequency Range(2)
2. The input frequency fXTAL, the PLL divider M and P must match the VCO frequency range: fVCO = fXTAL M ÷ P. The feedback divider M is
limited to 170 <= M <= 340 (for P = 2) and 340 <= M <= 680 (for P = 4) for stable PLL operation.
1360
2720
MHz
fMAX
Output Frequency(3)
N = ÷2
N = ÷4
N = ÷8
N = ÷16
N = ÷32
N = ÷64
3. Output frequency for QA, QB if NB = 0. With NB = 1 the QB output frequency is half of the QA output frequency.
680
340
170
85
42.5
21.25
1360
680
340
170
85
42.5
MHz
fSCL
Serial Interface (I2C) Clock Frequency
0
0.4
MHz
tP,MIN
Minimum Pulse Width (P_LOAD)50
ns
DC
Output Duty Cycle
45
50
55
%
tSK(O)
Output-to-Output Skew
NB = 0 (fQA = fQB)
NB = 1 (fQA = 2 fQB)
38
96
ps
tr, tf
Output Rise/Fall Time (QA, QB)
0.05
0.3
ns
20% to 80%
tr, tf
Output Rise/Fall Time (SDA)
250
ns
CL = 400 pF
tP_EN
Output Enable Time (CLKSTOPx to QA, QB)
0
2 TQx
TQx = Output period
tP_DIS
Output Disable Time (CLKSTOPx to QA, QB)
0
1.5 TQx
TQx = Output period
tJIT(CC) Cycle-to-Cycle Jitter (RMS 1σ)
(4)
N = ÷2, ÷4, ÷8
N = ÷16
N = ÷32
N = ÷64
N = ÷128
4. Maximum cycle jitter measured at the lowest VCO frequency. Figure 8 shows the cycle jitter vs. frequency characteristics.
15
37
32
50
85
ps
tJIT(PER) Period Jitter (RMS 1σ)(5)
N = ÷2, ÷4
N = ÷8
N = ÷16
N = ÷32
N = ÷64
N = ÷128
5. Maximum cycle period measured at the lowest VCO frequency. Figure 9 shows the period jitter vs. frequency characteristics.
10
13
24
34
60
85
ps
BW
PLL Closed Loop Bandwidth(6)
P = 2
P = 4
6. –3 dB point of PLL transfer characteristics.
250 – 700
125 – 400
kHz
tLOCK
Maximum PLL Lock Time
10
ms
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