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MOTOROLA
Contents
xiii
CONTENTS
Paragraph
Number
Title
Page
Number
11.1.3.1
11.1.3.2
11.1.3.3
11.1.4
11.1.5
11.1.6
11.1.7
11.1.8
11.1.9
11.2
11.3
11.3.1
11.3.1.1
11.3.2
11.4
PLL Loss of Lock ......................................................................................11-3
Software Watchdog Reset..........................................................................11-3
Checkstop Reset.........................................................................................11-3
Debug Port Hard or Soft Reset.......................................................................11-3
JTAG Reset....................................................................................................11-3
Power-On and Hard Reset Sequence .............................................................11-3
External Soft Reset.........................................................................................11-4
Internal Soft Reset..........................................................................................11-4
Soft Reset Sequence.......................................................................................11-4
Reset Status Register (RSR)...............................................................................11-5
MPC850 Reset Configuration............................................................................11-6
Hard Reset......................................................................................................11-7
Hard Reset Configuration Word................................................................11-9
Soft Reset.....................................................................................................11-11
TRST and Power Mode Considerations...........................................................11-11
Chapter 12
External Signals
12.1
12.2
12.3
12.4
12.4.1
12.4.1.1
12.4.2
12.4.3
12.4.4
12.5
System Bus Signals............................................................................................12-5
Active Pull-Up Buffers.....................................................................................12-18
Internal Pull-Up and Pull-Down Resistors......................................................12-19
Recommended Basic Pin Connections.............................................................12-20
Reset Configuration .....................................................................................12-20
Bus Control Signals and Interrupts..........................................................12-20
JTAG and Debug Ports ................................................................................12-21
Unused Inputs...............................................................................................12-21
Unused Outputs............................................................................................12-21
Signal States during Hardware Reset...............................................................12-21
Chapter 13
External Bus Interface
13.1
13.2
13.3
13.4
13.4.1
13.4.2
13.4.2.1
13.4.2.2
13.4.3
Features..............................................................................................................13-1
Bus Transfer Overview......................................................................................13-1
Bus Interface Signal Descriptions......................................................................13-2
Bus Operations...................................................................................................13-6
Basic Transfer Protocol..................................................................................13-6
Single-Beat Transfer ......................................................................................13-7
Single-Beat Read Flow ..............................................................................13-7
Single-Beat Write Flow .............................................................................13-9
Burst Transfers.............................................................................................13-13