參數(shù)資料
型號(hào)： MPC8379E-RDB
廠商： Freescale Semiconductor
文件頁數(shù)： 76/117頁
文件大小： 0K
描述： BOARD REFERENCE FOR MPC837
標(biāo)準(zhǔn)包裝： 1
系列： PowerQUICC II™ PRO
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8379
所含物品： 板
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
61
15.2.1
Gen1i/1.5G Transmitter Specifications
This table provides the DC differential transmitter output DC characteristics for the SATA interface at
Gen1i or 1.5 Gbits/s transmission.
This table provides the differential transmitter output AC characteristics for the SATA interface at Gen1i
or 1.5 Gbits/s transmission.
15.2.2
Gen2i/3G Transmitter Specifications
This table provides the differential transmitter output DC characteristics for the SATA interface at Gen2i
or 3.0 Gbits/s transmission.
Table 52. Gen1i/1.5G Transmitter (Tx) DC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Note
Tx differential output voltage
VSATA_TXDIFF
400
500
600
mVp-p
Tx differential pair impedance
ZSATA_TXDIFFIM
85
100
115
Ω
—
Note:
1. Terminated by 50
Ω load.
Table 53. Gen1i/1.5G Transmitter AC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Note
Channel speed
tCH_SPEED
—
1.5
—
Gbps
—
Unit interval
TUI
666.4333
666.667
670.2333
ps
—
Total jitter, data-data
5UI
USATA_TXTJ5UI
—
0.355
UIp-p
Total jitter, data-data
250 UI
USATA_TXTJ250UI
—
0.47
UIp-p
Deterministic jitter, data-data
5UI
USATA_TXDJ5UI
—
0.175
UIp-p
Deterministic jitter, data-data
250 UI
USATA_TXDJ250UI
—
0.22
UIp-p
Note:
1. Measured at Tx output pins peak to peak phase variation, random data pattern.
Table 54. Gen 2i/3G Transmitter DC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Note
Tx differential output voltage
VSATA_TXDIFF
400
550
700
mVp-p
Tx differential pair impedance
ZSATA_TXDIFFIM
85
100
115
Ω
—
Note:
1. Terminated by 50
Ω load.
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