參數(shù)資料
型號(hào)： MPC8260CZUHFBC
廠(chǎng)商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 166 MHz, RISC PROCESSOR, PBGA480
封裝： 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480
文件頁(yè)數(shù)： 18/48頁(yè)
文件大?。?/td> 688K
代理商： MPC8260CZUHFBC
MOTOROLA
MPC826xA (HiP4) Family Hardware Specications
25
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Clock Conguration Modes
1010_010
100 MHz
2
200 MHz
3
300 MHz
3/6
66/33 MHz
1010_011
100 MHz
2
200 MHz
3.5
350 MHz
3/6
66/33 MHz
1010_100
100 MHz
2
200 MHz
4
400 MHz
3/6
66/33 MHz
1011_000
100 MHz
2.5
250 MHz
2
200 MHz
4/8
62/31 MHz
1011_001
100 MHz
2.5
250 MHz
2.5
250 MHz
4/8
62/31MHz
1011_010
100 MHz
2.5
250 MHz
3
300 MHz
4/8
62/31 MHz
1011_011
100 MHz
2.5
250 MHz
3.5
350 MHz
4/8
62/31 MHz
1011_100
100 MHz
2.5
250 MHz
4
400 MHz
4/8
62/31 MHz
1100_0004
66MHz
2
133MHz
Bypass
66MHz
2/4
66/33 MHz
1100_0014
66MHz
2.5
166MHz
Bypass
66MHz
3/6
55/28 MHz
1100_0104
66MHz
3
200MHz
Bypass
66MHz
3/6
66/33 MHz
1 66 MHz congurations are required for input clock frequencies
≥ 50 MHz;
33 MHz congurations are required for input clock frequencies below 50 MHz
2 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is
divided by 2 (33 instead of 66 MHz, etc.).
3 In this mode, PCI_MODCK must be “0”.
4 In this mode the Core PLL is bypassed (core frequency equals to bus frequency; for debug purpose only).
Table 18. Clock Default Congurations in PCI Agent Mode (MODCK_HI = 0000)1
1 The user should verify that all buses and functions run frequencies that are within the supported ranges.
MODCK[1–3]2
2 Assumes MODCK_HI = 0000.
Input Clock
Frequency
CPM
Multiplication
Factor3
3 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is
divided by 2 (33 instead of 66 MHz, etc.) and the CPM multiplication factor is multiplied by 2.
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency4
4 Core frequency = (60x bus frequency)(core multiplication factor)
Bus Division
Factor
60x Bus
Frequency5
5 Bus frequency = CPM frequency / bus division factor
000
66/33 MHz
2/4
133 MHz
2.5
166 MHz
2
66 MHz
001
66/33 MHz
2/4
133 MHz
3
200 MHz
2
66 MHz
010
66/33 MHz
3/6
200 MHz
3
200 MHz
3
66 MHz
011
66/33 MHz
3/6
200 MHz
4
266 MHz
3
66 MHz
100
66/33 MHz
3/6
200 MHz
3
240 MHz
2.5
80 MHz
101
66/33 MHz
3/6
200 MHz
3.5
280 MHz
2.5
80 MHz
110
66/33 MHz
4/8
266 MHz
3.5
300 MHz
3
88 MHz
111
66/33 MHz
4/8
266 MHz
3
300 MHz
2.5
100 MHz
Table 17. Clock Conguration Modes in PCI Host Mode (Continued)
MODCK_H –
MODCK[1–3]
Input Clock
Frequency1
(Bus)
CPM
Multiplication
Factor
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency
PCI Division
Factor2
PCI
Frequency2
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