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Analog Integrated Circuit Device Data
38
Freescale Semiconductor
908E625
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SYSTEM CONTROL REGISTER (SYSCTL)
Power Stages On Bit (PSON)
This read/write bit enables the power stages (half-bridges,
high side, LIN transmitter, Analog Input PA1 current sources,
and HVDD output). Reset clears the PSON bit.
1 = Power stages enabled.
0 = Power stages disabled.
LIN Slew Rate Selection Bits (SRS0:SRS1)
These read/write bits enable the user to select the
appropriate LIN slew rate for different baud rate
The high speed slew rates are used, for example, for
programming via the LIN and are not intended for use in the
application.
Go to STOP Mode Bit (GS)
This write-only bit instructs the 908E625 to power down
and go into STOP mode. Reset or CPU interrupt requests
clear the GS bit.
1 = Power down and go into STOP mode
0 = Not in STOP mode
SYSTEM STATUS REGISTER (SYSSTAT)
Hall-Effect Sensor Input Pin Overcurrent Flag Bit
(HP_OCF)
This read/write flag is set on an overcurrent condition at
one of the Hall-effect sensor input pins. Clear HP_OCF and
enable the output by writing a Logic [1] to the HP_OCF flag.
Reset clears the HP_OCF bit. Writing a Logic [0] to HP_OCF
has no effect.
1 = Overcurrent condition on Hall-effect sensor input pin
has occurred
0 = No overcurrent condition on Hall-effect sensor input
pin has occurred
LIN Current Limitation Bit (LINCL)
This read-only bit is set if the LIN transmitter operates in
current limitation region. Due to excessive power dissipation
in the transmitter, software is advised to turn the transmitter
off immediately.
1 = Transmitter operating in current limitation region
0 = Transmitter not operating in current limitation region
HVDD Output Overcurrent Flag Bit (HVDD_OCF)
This read/write flag is set on an overcurrent condition at
the HVDD pin. Clear HVDD_OCF and enable the output by
writing a Logic [1] to the HVDD_OCF Flag. Reset clears the
HVDD_OCF bit. Writing a Logic [0] to HVDD_OCF has no
effect.
1 = Overcurrent condition on HVDD has occurred
0 = No overcurrent condition on HVDD has occurred
High-Side Overcurrent Flag Bit (HS_OCF)
This read/write flag is set on an overcurrent condition at
the high-side driver. Clear HS_OCF and enable the high-side
driver by writing a Logic [1] to HS_OCF. Reset clears the
HS_OCF bit. Writing a Logic [0] to HS_OCF has no effect.
1 = Overcurrent condition on high-side drivers has
occurred
0 = No overcurrent condition on high-side drivers has
occurred
Low-Voltage Bit (LVF)
This read only bit is a copy of the LVF bit in the Interrupt
Flag Register.
1 = Low-voltage condition has occurred
0 = No low-voltage condition has occurred
High-Voltage Sensor Bit (HVF)
This read-only bit is a copy of the HVF bit in the Interrupt
Flag Register.
1 = High-voltage condition has occurred
0 = No high-voltage condition has occurred
H-Bridge Overcurrent Flag Bit (HB_OCF)
This read / write flag is set on an overcurrent condition at
the H-Bridges. Clear HB_OCF and enable the H-Bridge
driver by writing a Logic [1] to HB_OCF. Reset clears the
HB_OCF bit. Writing a Logic [0] to HB_OCF has no effect.
1 = Overcurrent condition on H-Bridges has occurred
0 = No overcurrent condition on H-Bridges has occurred
Register Name and Address: SYSCTL - $03
Bits
7
6
5
4
3
2
1
0
Read
PSON SRS1
SRS0
0
Write
GS
Reset
00
Table 11. LIN Slew Rate Selection Bits
SRS1
SRS0
LIN Slew Rate
0
Initial Slew Rate (20 kBaud)
0
1
Slow Slew Rate (10 kBaud)
1
0
High Speed II (8x)
1
High Speed I (4x)
Register Name and Address: SYSSTAT - $0c
Bits
7
6
5
4
3
2
1
0
Read
HP_
OCF
LINCL
HVDD
_OCF
HS_
OCF
LVF
HVF
HB_
OCF
HTF
Write
Reset
0000