參數(shù)資料
型號: MK51DX256ZCLL10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 35/74頁
文件大?。?/td> 1031K
代理商: MK51DX256ZCLL10
4. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
5. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
6. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
RAS
VAS
CAS
ZAS
VADIN
ZADIN
RADIN
CADIN
Pad
leakage
due to
input
protection
INPUT PIN
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
ADC SAR
ENGINE
Figure 11. ADC input impedance equivalency diagram
6.6.1.2 16-bit ADC electrical characteristics
Table 26. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA)
Symbol
Description
Min.
Typ.2
Max.
Unit
Notes
IDDA_ADC Supply current
0.215
1.7
mA
fADACK
ADC
asynchronous
clock source
ADLPC=1, ADHSC=0
ADLPC=1, ADHSC=1
ADLPC=0, ADHSC=0
ADLPC=0, ADHSC=1
1.2
3.0
2.4
4.4
2.4
4.0
5.2
6.2
3.9
7.3
6.1
9.5
MHz
tADACK = 1/
fADACK
Sample Time
See Reference Manual chapter for sample times
Table continues on the next page...
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
40
Preliminary
Freescale Semiconductor, Inc.
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