參數(shù)資料
型號: MK2049-35SI
元件分類: 時鐘產(chǎn)生/分配
英文描述: 49.152 MHz, OTHER CLOCK GENERATOR, PDSO20
封裝: 0.300 INCH, SOIC-20
文件頁數(shù): 2/9頁
文件大?。?/td> 112K
代理商: MK2049-35SI
MK2049-35
3.3 V Communications Clock PLL
MDS 2049-35 B
2
Revision 081401
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
Pin Descriptions
Type:
XI, XO = crystal connections, I = Input, O = output, P = power supply connection, LF = loop filter
connections
Pin Assignment
20 pin (300 mil) SOIC
1
16
2
3
4
15
14
13
VDD
GND
X2
VDD
GND
5
6
7
8
12
11
10
9
FS3
X1
FS1
FS0
CAP1
ICLK
8K
CLK/2
CLK
18
17
19
20
FCAP
VDD
FS2
GND
CAP2
RES
Number Name
Type Description
1
FS1
I
Frequency Select 1. Determines CLK input/outputs per tables on page 4.
2
X2
XO
Crystal connection. Connect to a MHz crystal as shown in the tables on page 4.
3
X1
XI
Crystal connection. Connect to a MHz crystal as shown in the tables on page 4.
4
VDD
P
Connect to +3.3V.
5
FCAP
-
Filter Capacitor. Connect a 1000 pF ceramic capacitor to ground.
6
VDD
P
Connect to +3.3V.
7
GND
P
Connect to ground.
8
CLK
O
Clock output determined by status of FS3:0 per tables on page 4.
9
CLK/2
O
Clock output determined by status of FS3:0 per tables on page 4. Always 1/2 of CLK.
10
8K
O
Recovered 8 kHz clock output.
11
FS2
I
Frequency Select 2. Determines CLK input/outputs per tables on page 4.
12
FS3
I
Frequency Select 3. Determines CLK input/outputs per tables on page 4.
13
ICLK
I
Input clock connection. Connect to 8 kHz backplane or MHz clock.
14
GND
P
Connect to ground.
15
VDD
P
Connect to +3.3V.
16
CAP1
LF
Connect the loop filter ceramic capacitors and resistor between this pin and CAP2.
17
GND
P
Connect to ground.
18
CAP2
LF
Connect the loop filter ceramic capacitors and resistor between this pin and CAP1.
19
RES
-
Connect a 10-200k
resistor to ground. Contact ICS at 408-297-1201 for recommended value for your app.
20
FS0
I
Frequency Select 0. Determines CLK input/outputs per tables on page 4.
相關PDF資料
PDF描述
MK2049-44SI 51.84 MHz, OTHER CLOCK GENERATOR, PDSO20
MK2049-45ASITR 125 MHz, OTHER CLOCK GENERATOR, PDSO20
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MK2049-45SILFTR 125 MHz, OTHER CLOCK GENERATOR, PDSO20
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相關代理商/技術參數(shù)
參數(shù)描述
MK2049-35SITR 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL
MK2049-36 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL
MK2049-36SI 功能描述:IC VCXO PLL CLK SYNTH 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:*
MK2049-36SILF 功能描述:時鐘發(fā)生器及支持產(chǎn)品 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
MK2049-36SILFTR 功能描述:時鐘合成器/抖動清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel