參數(shù)資料
型號: MK1581-01GILF
元件分類: 時鐘產(chǎn)生/分配
英文描述: 2.048 MHz, OTHER CLOCK GENERATOR, PDSO16
封裝: 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-16
文件頁數(shù): 10/10頁
文件大?。?/td> 152K
代理商: MK1581-01GILF
Low Phase Noise T1 / E1 Clock Generator
MDS 1581-01 C
9
Revision 050803
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 295-9800
www.icst.com
MK1581-01
Note 1: Minimum high or low time of input clock.
Note 2: The input to output clock skew is not controlled nor predictable and will change between power up
cycles. Because it is dependent on the phase relationship between the output and feedback divider states
following power up, the input to output clock skew will remain stable during a given power up cycle. If
controlled input to output skew is desired for this output clock frequency please refer to the MK2049 or
MK2069 products.
Thermal Characteristics
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
1.5
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
1.5
ns
Skew, Input to Output Clock
tIO
Note 2
Cycle Jitter (short term jitter)
tja
Peak to Peak
150
ps p-p
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Thermal Resistance Junction to
Ambient
qJA
Still air
78
°C/W
qJA
1 m/s air flow
70
°C/W
qJA
3 m/s air flow
68
°C/W
Thermal Resistance Junction to Case
qJC
37
°C/W
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
相關(guān)PDF資料
PDF描述
MK1581-01GITR 2.048 MHz, OTHER CLOCK GENERATOR, PDSO16
MK1581-01GI 2.048 MHz, OTHER CLOCK GENERATOR, PDSO16
MK1704A 140 MHz, OTHER CLOCK GENERATOR, PDSO8
MK1705A 167 MHz, VIDEO CLOCK GENERATOR, PDSO8
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