參數(shù)資料
型號: MICRF405YML TR
廠商: Micrel Inc
文件頁數(shù): 35/46頁
文件大?。?/td> 649K
描述: TRANSMITTER ASK/FSK 24-MLF
標(biāo)準(zhǔn)包裝: 1
頻率: 290MHz ~ 980MHz
應(yīng)用: ISM
調(diào)制或協(xié)議: ASK,F(xiàn)SK
數(shù)據(jù)傳輸率 - 最大: 200 kbps
功率 - 輸出: 10dBm
電流 - 傳輸: 18mA
數(shù)據(jù)接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
封裝/外殼: 24-VFQFN 裸露焊盤,24-MLF?
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 571 (CN2011-ZH PDF)
其它名稱: 576-1965-6
Micrel
MICRF405
 
 
 
 
April 2006 
35
M9999-041906
 (408) 955-1690
 
PA2
PA1
PA0
State
0
0
0
21dB attenuation or PA off if PA_LDc_en=0
0
0
1
18dB attenuation
0
1
0
15dB attenuation
0
1
1
12dB attenuation
1
0
0
9dB attenuation
1
0
1
6dB attenuation
1
1
0
3dB attenuation
1
1
1
Max output
Table 21. Power Amplifier.
 
ClkOut_en
ClkOut_1     ClkOut_0
State
Comments
0
X
X
CLKOUT off
Output is 0 volt.
1
0
0
CLKOUT on
The XCO frequency is divided by 16.
1
0
1
CLKOUT on
The XCO frequency is divided by 8.
1
1
0
CLKOUT on
The XCO frequency is divided by 4.
1
1
1
CLKOUT on
The XCO frequency is divided by 2.
Table 22. Output Clock.
 
Bit_IO_en     Sync_en     State
Comments
0
X
DCLK pin on, RDY
Byte ready, RDY, signal from databyte
1
0
DCLK pin off
Transparent transmission of data
1
1
DCLK pin on, DATACLK
Bit-clock is generated by transmitter
Table 23. Synchronizer Mode
 
ASK_EN     Modulation1    Modulation0     State
Comments
0
0
0
Closed loop VCO-modulation
VCO is phase-locked
0
0
1
Open loop VCO-modulation
VCO is free-running
0
1
0
Modulation by A,M and N
Modulation inside PLL
0
1
1
Not used
 
1
0
0
SK modulation with spreading code applied to
VCO. Not recommended.
VCO is phase-locked
1
0
1
SK modulation with spreading code applied to
VCO. Not recommended.
VCO is free-running
1
1
0
SK modulation with spreading code applied to
internal modulation by A, M and M
Modulation inside PLL
1
1
1
ASK modulation
VCO is phase-locked
Table 24. Modulation.
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