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參數資料
| 型號： | MCP2510T-E/SO |
| 廠商： | Microchip Technology |
| 文件頁數： | 69/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CAN CONTROLLER W/SPI 18-SOIC |
| 標準包裝： | 1,100 |
| 控制器類型： | CAN 接口 |
| 接口： | SPI |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 電源： | 10mA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 18-SOIC |
| 包裝： | 帶卷 (TR) |
| 配用： | DV251001-ND - KIT DEVELOPMENT CAN MCP2510 |
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2009 Microchip Technology Inc.
DS39637D-page 71
PIC18F2480/2580/4480/4580
6.2
PIC18 Instruction Cycle
6.2.1
CLOCKING SCHEME
The microcontroller clock input, whether from an inter-
nal or external source, is internally divided by four to
generate four non-overlapping quadrature clocks (Q1,
Q2, Q3 and Q4). Internally, the Program Counter (PC)
is incremented on every Q1; the instruction is fetched
from the program memory and latched into the Instruc-
tion Register (IR) during Q4. The instruction is decoded
and executed during the following Q1 through Q4. The
clocks and instruction execution flow are shown in
6.2.2
INSTRUCTION FLOW/PIPELINING
An “Instruction Cycle” consists of four Q cycles: Q1
through Q4. The instruction fetch and execute are
pipelined in such a manner that a fetch takes one
instruction cycle, while the decode and execute take
another instruction cycle. However, due to the
pipelining, each instruction effectively executes in one
cycle. If an instruction causes the program counter to
change (e.g., GOTO), then two cycles are required to
complete the instruction (Example 6-3).
A fetch cycle begins with the program counter
incrementing in Q1.
In the execution cycle, the fetched instruction is latched
into the Instruction Register (IR) in cycle Q1. This
instruction is then decoded and executed during the
Q2, Q3 and Q4 cycles. Data memory is read during Q2
(operand read) and written during Q4 (destination
write).
FIGURE 6-3:
CLOCK/INSTRUCTION CYCLE
EXAMPLE 6-3:
INSTRUCTION PIPELINE FLOW
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
OSC1
Q1
Q2
Q3
Q4
PC
OSC2/CLKO
(RC mode)
PC
PC + 2
PC + 4
Fetch INST (PC)
Execute INST (PC – 2)
Fetch INST (PC + 2)
Execute INST (PC)
Fetch INST (PC + 4)
Execute INST (PC + 2)
Internal
Phase
Clock
Note:
All instructions are single cycle, except for any program branches. These take two cycles since the
fetch instruction is “flushed” from the pipeline while the new instruction is being fetched and then
executed.
TCY0TCY1TCY2TCY3TCY4TCY5
1. MOVLW 55h
Fetch 1
Execute 1
2. MOVWF PORTB
Fetch 2
Execute 2
3. BRA
SUB_1
Fetch 3
Execute 3
4. BSF
PORTA, BIT3 (Forced NOP)
Fetch 4
Flush (NOP)
5. Instruction @ address SUB_1
Fetch SUB_1 Execute SUB_1
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MCP2510T-I/SO | 功能描述:網絡控制器與處理器 IC Stand-alone CAN RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCP2510T-I/ST | 功能描述:網絡控制器與處理器 IC Stand-alone CAN RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCP2515 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone CAN Controller With SPI Interface |
| MCP2515_12 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone CAN Controller with SPI Interface |
| MCP2515DM-BM | 功能描述:網絡開發(fā)工具 CAN Bus Monitor Demo Board RoHS:否 制造商:Rabbit Semiconductor 產品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數據速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
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