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| 型號(hào)： | MCP2510T-E/SO |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 22/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CAN CONTROLLER W/SPI 18-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,100 |
| 控制器類型： | CAN 接口 |
| 接口： | SPI |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 電源： | 10mA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 18-SOIC |
| 包裝： | 帶卷 (TR) |
| 配用： | DV251001-ND - KIT DEVELOPMENT CAN MCP2510 |
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2007 Microchip Technology Inc.
DS21291F-page 29
MCP2510
4.5
Message Acceptance Filters and
Masks
The Message Acceptance Filters And Masks are used
to determine if a message in the message assembly
buffer should be loaded into either of the receive buff-
ers (see Figure 4-3). Once a valid message has been
received into the MAB, the identifier fields of the mes-
sage are compared to the filter values. If there is a
match, that message will be loaded into the appropriate
receive buffer. The filter masks (see Register 4-10
through Register 4-17) are used to determine which
bits in the identifier are examined with the filters. A truth
table is shown below in Table 4-1 that indicates how
each bit in the identifier is compared to the masks and
filters to determine if a the message should be loaded
into a receive buffer. The mask essentially determines
which bits to apply the acceptance filters to. If any mask
bit is set to a zero, then that bit will automatically be
accepted regardless of the filter bit.
TABLE 4-1:
FILTER/MASK TRUTH TABLE
As shown in the Receive Buffers Block Diagram
(Figure 4-1), acceptance filters RXF0 and RXF1, and
filter mask RXM0 are associated with RXB0. Filters
RXF2, RXF3, RXF4, and RXF5 and mask RXM1 are
associated with RXB1. When a filter matches and a
message is loaded into the receive buffer, the filter
number that enabled the message reception is loaded
into the RXBNCTRL register FILHIT bit(s). For RXB1
the RXB1CTRL register contains the FILHIT<2:0> bits.
They are coded as follows:
- 101 = Acceptance Filter 5 (RXF5)
- 100 = Acceptance Filter 4 (RXF4)
- 011 = Acceptance Filter 3 (RXF3)
- 010 = Acceptance Filter 2 (RXF2)
- 001 = Acceptance Filter 1 (RXF1)
- 000 = Acceptance Filter 0 (RXF0)
RXB0CTRL contains two copies of the BUKT bit and
the FILHIT<0> bit.
The coding of the BUKT bit enables these three bits to
be used similarly to the RXB1CTRL.FILHIT bits and to
distinguish a hit on filter RXF0 and RXF1 in either
RXB0 or after a roll over into RXB1.
- 111 = Acceptance Filter 1 (RXF1)
- 110 = Acceptance Filter 0 (RXF0)
- 001 = Acceptance Filter 1 (RXF1)
- 000 = Acceptance Filter 0
If the BUKT bit is clear, there are six codes correspond-
ing to the six filters. If the BUKT bit is set, there are six
codes corresponding to the six filters plus two addi-
tional codes corresponding to RXF0 and RXF1 filters
that roll over into RXB1.
If more than one acceptance filter matches, the FILHIT
bits will encode the binary value of the lowest num-
bered filter that matched. In other words, if filter RXF2
and filter RXF4 match, FILHIT will be loaded with the
value for RXF2. This essentially prioritizes the accep-
tance filters with a lower number filter having higher pri-
ority. Messages are compared to filters in ascending
order of filter number.
The mask and filter registers can only be modified
when the MCP2510 is in configuration mode (see
Mask Bit
n
Filter Bit
n
Message
Identifier bit
n001
Accept or
reject bit n
0X
X
Accept
10
0
Accept
1
0
1
Reject
1
0
Reject
11
1
Accept
Note:
X = don’t care
Note:
000
and 001 can only occur if the BUKT bit
(see Table 4-1) is set in the RXB0CTRL
register allowing RXB0 messages to roll
over into RXB1.
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