參數(shù)資料
型號: MCF52223CVM66J
廠商: Freescale Semiconductor
文件頁數(shù): 16/55頁
文件大?。?/td> 0K
描述: IC MCU 32BIT W/USB 81MAPBGA
標準包裝: 240
系列: MCF5222x
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 66MHz
連通性: I²C,SPI,UART/USART,USB OTG
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-LBGA
包裝: 托盤
Family Configurations
MCF52223 ColdFire Microcontroller, Rev. 3
Freescale Semiconductor
23
1.10
UART Module Signals
Table 12 describes the UART module signals.
1.11
DMA Timer Signals
Table 13 describes the signals of the four DMA timer modules.
1.12
ADC Signals
Table 14 describes the signals of the Analog-to-Digital Converter.
Table 12. UART Module Signals
Signal Name
Abbreviation
Function
I/O
Transmit Serial Data
Output
UTXDn
Transmitter serial data outputs for the UART modules. The output is
held high (mark condition) when the transmitter is disabled, idle, or in
the local loopback mode. Data is shifted out, LSB first, on this pin at
the falling edge of the serial clock source.
O
Receive Serial Data
Input
URXDn
Receiver serial data inputs for the UART modules. Data is received on
this pin LSB first. When the UART clock is stopped for power-down
mode, any transition on this pin restarts the clock.
I
Clear-to-Send
UCTSn
Indication to the UART modules that they can begin data
transmission.
I
Request-to-Send
URTSn
Automatic request-to-send outputs from the UART modules. This
signal can also be configured to be asserted and negated as a
function of the RxFIFO level.
O
Table 13. DMA Timer Signals
Signal Name
Abbreviation
Function
I/O
DMA Timer Input
DTIN
Event input to the DMA timer modules.
I
DMA Timer Output
DTOUT
Programmable output from the DMA timer modules.
O
Table 14. ADC Signals
Signal Name
Abbreviation
Function
I/O
Analog Inputs
AN[7:0]
Inputs to the analog-to-digital converter.
I
Analog Reference
VRH
Reference voltage high and low inputs.
I
VRL
I
Analog Supply
VDDA
Isolate the ADC circuitry from power supply noise.
VSSA
ADC Sync Inputs
SYNCA /
SYNCB
These signals can initiate an analog-to-digital conversion
process.
I
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