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參數(shù)資料
| 型號： | MC9328MXLVP20 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 元件分類： | 微處理器 |
| 英文描述： | i.MX Integrated Portable System Processor |
| 中文描述： | i.MX處理器集成的便攜式系統(tǒng) |
| 文件頁數(shù)： | 7/96頁 |
| 文件大小： | 1495K |
| 代理商： | MC9328MXLVP20 |
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Signals and Connections
MC9328MX1 Advance Information, Rev. 4
Freescale Semiconductor
7
DQM [3:0]
SDRAM data enable
CSD0
SDRAM/SyncFlash Chip Select signal which is multiplexed with the CS2 signal. These two signals
are selectable by programming the system control register.
CSD1
SDRAM/SyncFlash Chip Select signal which is multiplex with CS3 signal. These two signals are
selectable by programming the system control register. By default, CSD1 is selected, so it can be
used as SyncFlash boot chip select by properly configuring BOOT [3:0] input pins.
RAS
SDRAM/SyncFlash Row Address Select signal
CAS
SDRAM/SyncFlash Column Address Select signal
SDWE
SDRAM/SyncFlash Write Enable signal
SDCKE0
SDRAM/SyncFlash Clock Enable 0
SDCKE1
SDRAM/SyncFlash Clock Enable 1
SDCLK
SDRAM/SyncFlash Clock
RESET_SF
SyncFlash Reset
Clocks and Resets
EXTAL16M
Crystal input (4 MHz to 16 MHz), or a 16 MHz oscillator input when internal oscillator circuit is shut
down.
XTAL16M
Crystal output
EXTAL32K
32 kHz crystal input
XTAL32K
32 kHz crystal output
CLKO
Clock Out signal selected from internal clock signals. Please refer to clock controller for internal
clock selection.
RESET_IN
Master Reset—External active low Schmitt trigger input signal. When this signal goes active, all
modules (except the reset module and the clock control module) are reset.
RESET_OUT
Reset Out—Internal active low output signal from the Watchdog Timer module and is asserted from
the following sources: Power-on reset, External reset (RESET_IN), and Watchdog time-out.
POR
Power On Reset—Internal active high Schmitt trigger input signal. The POR signal is normally
generated by an external RC circuit designed to detect a power-up event.
JTAG
TRST
Test Reset Pin—External active low signal used to asynchronously initialize the JTAG controller.
TDO
Serial Output for test instructions and data. Changes on the falling edge of TCK.
TDI
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MXLVP20R2 | 功能描述:處理器 - 專門應用 DRAGONBALL MXL 225 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Advance Information |
| MC9328MXSCVF10 | 制造商:Rochester Electronics LLC 功能描述:REDUCED FEATURE I.MXL - Bulk 制造商:Freescale Semiconductor 功能描述: 制造商:Motorola Inc 功能描述: |
| MC9328MXSCVF10(R2) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Advance Information |
| MC9328MXSCVF10R2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Advance Information |
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