參數(shù)資料
型號(hào)： MC9328MXL20
廠(chǎng)商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, MICROPROCESSOR, PBGA256
封裝： 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件頁(yè)數(shù)： 51/84頁(yè)
文件大?。?/td> 1492K
代理商： MC9328MXL20
Specifications
MOTOROLA
MC9328MXL Advance Information
55
Figure 45. Timing Diagrams at Data Transfer Mode
Figure 46 on page 56 shows basic read operation timing. In a read operation, the sequence starts with a
single block read command (which specifies the start address in the argument field). The response is sent
on the SD_CMD lines as usual. Data transmission from the card starts after the access time delay NAC,
beginning from the last bit of the read command. If the system is in multiple block read mode, the card
sends a continuous flow of data blocks with distance NAC until the card sees a stop transmission command.
The data stops two clock cycles after the end bit of the stop command.
Timing of command sequences (all modes)
Timing response end to next CMD start (data transfer mode)
Command response timing (data transfer mode)
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z Z
******
CRC
Z
Response
Host Command
NRC cycles
CMD
Content
S T
E Z
Z S T
Content
CRC E Z Z
******
CRC
Z
Host Command
NCC cycles
CMD
Content
S T
E Z
Z S T
Content
CRC E Z Z
******
CRC
Z
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