參數(shù)資料
型號: MC705JP7CPE
廠商: Freescale Semiconductor
文件頁數(shù): 131/164頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 224 BYTES RAM 28PDIP
標(biāo)準(zhǔn)包裝: 13
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設(shè)備: POR,溫度傳感器,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 6KB(6K x 8)
程序存儲器類型: OTP
RAM 容量: 224 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
Port Transitions
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
69
7.5 Port Transitions
Glitches and temporary floating inputs can occur if the control bits regarding each port I/O pin are not
performed in the correct sequence.
Do not use read-modify-write instructions on pulldown register A or B.
Avoid glitches on port pins by writing to the port data register before changing data direction
register bits from a logic 0 to a logic 1.
Avoid a floating port input by clearing its pulldown register bit before changing its data direction
register bit from a logic 1 to a logic 0.
The SWPDI bit in the MOR turns off all port pulldown devices and disables software control of the
pulldown devices. Reset has no effect on the pulldown devices when the SWPDI bit is set.
Two or more output pins of the same port can be connected electrically to provide output currents
up to the sum of the maximum specified drive currents as defined in 15.7 DC Electrical
ensure that all ganged pins always maintain the same output logic value.
Table 7-4. Port C Pin Functions (28-Pin Versions Only)
Port C
Pin(s)
Control Bits
PORTC Access
(Pin or Data Register)
Result on
Port C Pins
SWPDI
in MOR
Port C
PDICH
PDICL
DDRCx(1)
1. DDRC can always be read or written.
Read
Write
Pulldown
Pin
PC0
PC1
PC2
PC3
0
X(2)
2. Don’t care
00
Pin
Data
On
PCx in
0
X(2)
1
0
Pin
Data
Off
PCx in
1X
X(2)
0
Pin
Data
Off
PCx in
X(2)
1
Data
Off
PCx out
PC4
PC5
PC6
PC7
00
X(2)
0
Pin
Data
On
PCx in
01
X(2)
0
Pin
Data
Off
PCx in
1X
X(2)
0
Pin
Data
Off
PCx in
X(2)
1
Data
Off
PCx out
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