參數(shù)資料
型號： MC705JP7CPE
廠商： Freescale Semiconductor
文件頁數(shù)： 123/164頁
文件大?。?/td> 0K
描述： IC MCU 8BIT 224 BYTES RAM 28PDIP
標準包裝： 13
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 22
程序存儲器容量： 6KB（6K x 8）
程序存儲器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 4x12b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-DIP（0.600"，15.24mm）
包裝： 管件
Port B
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
61
7.3.6 PB4/AN4/TCMP/CMP1 Logic
The PB4/AN4/TCMP/CMP1 pin can be used as a simple I/O port pin, be controlled by the OLVL bit from
the output compare function of the 16-bit programmable timer, or be controlled directly by the output of
comparator 1 as shown in Figure 7-9. The PB4 data, the programmable timer OLVL bit, and the output of
comparator 1 are all logically ORed together to drive the pin. Also, the analog subsystem input channel 4
multiplexer is connected directly to this pin. The operations of PB4 pin are summarized in Table 7-2.
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit
When using the PB4/AN4/TCMP/CMP1 pin, these interactions must be noted:
1.
If the OLVL timer output compare function is the required output function, then the DDRB4 bit must
be set, the PB4 data bit must be cleared, and the OPT bit in the COPR must be cleared. The
PB4/AN4/TCMP/CMP1 pin becomes an output which follows the state of the OLVL bit. The
pulldown device will be disabled in this case. The analog subsystem would not normally use this
pin as an analog input in this case.
2.
If the PB4 data bit is the required output function, then the DDRB4 bit must be set, the OLVL bit in
the TCR must be cleared, and the OPT bit in the COPR must be cleared. The pulldown device will
be disabled in this case. The analog subsystem would not normally use this pin as an analog input
in this case.
3.
If the comparator 1 output is the desired output function, then the PB4 data bit must be cleared, the
DDRB4 bit must be set, the OLVL bit in the TCR must be cleared, and the OPT bit in the COPR
must be set. The PB4/AN4/TCMP/CMP1 pin becomes an output which follows the state of the
OLVL bit. The pulldown device will be disabled in this case. The analog subsystem would not
normally use this pin as an analog input in this case.
PORT BDATA
REGISTER
BIT PB4
DATA DIRECTION
REGISTER B
BIT DDRB4
PULLDOWN
REGISTER B
BIT PDIB4
R
PB4
ANALOG SUBSYSTEM
INPUT AN4 AND
TIMER OUTPUT COMPARE
READ $0005
WRITE $0001
READ $0001
WRITE $0011
PULLDOWN
DEVICE
RESET
INTERNAL
D
AT
A
B
U
S
WRITE $0005
AN4
TCMP
OLVL
SWPDI
MASK OPTION REG. ($1FF1)
CMP1
(COMPARATOR 1 OUT)
(TIMER OUTPUT COMPARE)
OPT
COP REGISTER ($1FF0)
HIGH SINK/
SOURCE CURRENT
CAPABILITY
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相關代理商/技術參數(shù)
參數(shù)描述
MC705JP7CPE 制造商:Freescale Semiconductor 功能描述:IC 8BIT MCU 68HC05 2.1MHZ DIP-28
MC705K1CP 制造商:Motorola Inc 功能描述:16 PIN DIP INTEGRATED CIRCUIT
MC705L16CFUE 功能描述:8位微控制器 -MCU 8B MCU W/ EPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC705P6ACDWE 功能描述:8位微控制器 -MCU MCU 176 BYTES RAM A/D RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC705P6ACDWE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
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