參數(shù)資料
型號(hào): MC68HC08QT2CDWE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO8
封裝: LEAD FREE, EIAJ, SOIC-8
文件頁數(shù): 37/176頁
文件大?。?/td> 1124K
代理商: MC68HC08QT2CDWE
Registers
MC68HC08QY/QT Family Data Sheet, Rev. 2
Freescale Semiconductor
131
TOVx — Toggle-On-Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the counter overflows. When channel x is an input capture channel, TOVx has no effect.
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
NOTE
When TOVx is set, a counter overflow takes precedence over a channel x
output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at 1, setting the CHxMAX bit forces the duty cycle of buffered and unbuffered
PWM signals to 100%. As Figure 14-11 shows, the CHxMAX bit takes effect in the cycle after it is set
or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is cleared.
Figure 14-11. CHxMAX Latency
14.8.5 TIM Channel Registers
These read/write registers contain the captured counter value of the input capture function or the output
compare value of the output compare function. The state of the TIM channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the TIM channel x registers (TCHxH)
inhibits input captures until the low byte (TCHxL) is read.
In output compare mode (MSxB:MSxA
≠ 0:0), writing to the high byte of the TIM channel x registers
(TCHxH) inhibits output compares until the low byte (TCHxL) is written.
Bit 7
654321
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
Figure 14-12. TIM Channel x Register High (TCHxH)
Bit 7
654321
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
Figure 14-13. TIM Channel x Register Low (TCHxL)
OUTPUT
OVERFLOW
PERIOD
OVERFLOW
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
T1CHx
CHxMAX
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