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Serial Management Controllers (SMCs)
MC68360 USER’S MANUAL
DM—Diagnostic Mode
00 = Normal operation
01 = Local loopback mode
10 = Echo mode
11 = Reserved
TEN—SMC Transmit Enable
0 = SMC transmitter disabled
1 = SMC transmitter enabled
REN—SMC Receive Enable
0 = SMC receiver disabled
1 = SMC receiver enabled
7.11.7.12 SMC UART RECEIVE BUFFER DESCRIPTOR (RX BD). The CP reports infor-
mation concerning the received data on a per-buffer basis via Rx BDs. The CP closes
the current buffer, generates a maskable interrupt, and starts to receive data into the
next buffer after one of the following events:
1. Detection of an error during message processing
2. Detection of a full receive buffer
3. Reception of a programmable number of consecutive idle characters
NOTE: Entries in boldface must be initialized by the user.
An example of the UART Rx BD process is shown in Figure 7-76. This figure shows the
resulting state of the Rx BDs after receipt of 10 characters, an idle period, and five charac-
ters—one with a framing error. The example assumes that MRBLR = 8 in the SMC param-
eter RAM.
E—Empty
0 = The data buffer associated with this Rx BD has been filled with received data, or
data reception has been aborted due to an error condition. The CPU32+ core is
free to examine or write to any fields of this Rx BD. The CP will not use this BD
again while the E-bit remains zero.
1 = The data buffer associated with this BD is empty, or reception is currently in
progress. This Rx BD and its associated receive buffer are owned by the CP. Once
the E-bit is set, the CPU32+ core should not write any fields of this Rx BD.
Bits 14, 11, 10, 7, 6, 2—Reserved
15
14
13
12
11
10
9876543210
OFFSET + 0
E
—
WI
——
CM
ID
—
BR
FR
PR
—
OV
CD
OFFSET + 2
DATA LENGTH
OFFSET + 4
RX DATA BUFFER POINTER
OFFSET + 6
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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