參數(shù)資料
型號: MC56F8345VFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 56F8345 16-bit Hybrid Controller
中文描述: 0-BIT, 240 MHz, OTHER DSP, PQFP128
封裝: 14 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-128
文件頁數(shù): 14/148頁
文件大?。?/td> 1420K
代理商: MC56F8345VFG60
14
56F8345 Technical Data
Preliminary
2.2 56F8345 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality
must be programmed.
EMI is not functional in this package; since only part of the address/data bus is bonded out, use as
GPIO pins.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state.
Other states show the reset condition of the alternate function, which you get if the alternate pin
function is selected without changing the configuration of the alternate peripheral. For example,
the A8/GPIOA0 pin shows that it is tri-stated during reset. If the GPIOA_PER is changed to select
the GPIO function of the pin, it will become an input if no other registers are changed.
Table 2-2 56F8345 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
V
DD_IO
4
Supply
I/O Power
— This pin supplies 3.3V power to the chip I/O
interface.
V
DD_IO
14
V
DD_IO
25
V
DD_IO
36
V
DD_IO
62
V
DD_IO
76
V
DD_IO
112
V
DDA_ADC
94
Supply
ADC Power
— This pin supplies 3.3V power to the ADC
modules. It must be connected to a clean analog power
supply.
V
DDA_OSC_
PLL
72
Supply
Oscillator
and
PLL Power
— This pin supplies 3.3V
power to the OSC and to the internal regulator that in turn
supplies the Phase Locked Loop. It must be connected to
a clean analog power supply.
V
SS
3
Supply
Ground
— These pins provide ground for chip logic and
I/O drivers.
V
SS
21
V
SS
35
V
SS
59
V
SS
65
V
SSA_ADC
95
Supply
ADC Analog Ground
— This pin supplies an analog
ground to the ADC modules.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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