參數(shù)資料
型號: MC56F8345VFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 56F8345 16-bit Hybrid Controller
中文描述: 0-BIT, 240 MHz, OTHER DSP, PQFP128
封裝: 14 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-128
文件頁數(shù): 1/148頁
文件大?。?/td> 1420K
代理商: MC56F8345VFG60
MC56F8345/D
Rev. 8.0, 6/2004
Motorola, Inc., 2004. All rights reserved.
56F8345
Preliminary Technical Data
56F8345 16-bit Hybrid Controller
Up to 60 MIPS at 60MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
128KB Program Flash
4KB Program RAM
8KB Data Flash
8KB Data RAM
8KB Boot Flash
Two 6-channel PWM modules
Four 4-channel, 12-bit ADCs
Temperature Sensor
Two Quadrature Decoders
FlexCAN module
Optional On-Chip Regulator
Two Serial Communication Interfaces (SCIs)
Up to two Serial Peripheral Interface (SPIs)
Up to four general-purpose Quad Timers
Computer Operating Properly (COP)/Watchdog
JTAG/Enhanced On-Chip Emulation (OnCE) for
unobtrusive, real-time debugging
Up to 49 GPIO lines
128-pin LQFP Package
56F8345 Block Diagram - 128 LQFP
Quadrature
Decoder 1 or
Quad
Timer B or
SP1I or
GPIOC
Program Controller
and Hardware
Looping Unit
Data ALU
16 x 16 + 36 -->36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
16-Bit
56800E Core
Interrupt
Controller
COP/
Watchdog
SCI1 or
GPIOD
4
2
IRQA IRQB
PDB
CDBR
CDBW
PDB
CDBR
CDBW
XAB1
XAB2
XDB2
SCI0 or
GPIOE
SPI0 or
GPIOE
IPBus Bridge (IPBB)
Decoding
Peripherals
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
2
System Bus
Control
R/W Control
PAB
PAB
JTAG/
EOnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
V
CAP
V
DD
V
SS
V
DDA
V
SSA
5
4
7
5
2
V
PP
2
RESET
RSTO
4
6
3
4
6
3
Quad Timer
D or GPIOE
Quad Timer
C or GPIOE
ADCA
4
5
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
FlexCAN
2
4
2
ADCB
4
4
VREF
TEMP_SENSE
4
*
External
Address Bus
Switch
E
I
*
External
Data
Bus Switch
A8-13 or GPIOA0-5
D7-10 or GPIOF0-3
GPIOB0-4 or A16-20
GPIOD0-5 or CS2-7
*
Bus
Control
6
5
4
6
*
EMI not functional in
this package; use as
GPIO pins
PLL
Clock
Generator
XTAL
EXTAL
CLKMODE
Integration
Module
System
P
O
R
O
S
C
Clock
resets
CLKO
PWM Outputs
Fault Inputs
PWMA
Current Sense Inputs
or GPIOC
PWM Outputs
Fault Inputs
PWMB
Current Sense Inputs
or GPIOD
OCR_DIS
4
AD1
AD0
4
AD1
AD0
Data Memory
4K x 16 Flash
4K x 16 RAM
Memory
Program Memory
64K x 16 Flash
2K x 16 RAM
4K x 16 Boot
Flash
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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