參數(shù)資料
型號(hào)： MC56F8345MFG60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 56F8345 16-bit Hybrid Controller
中文描述： 0-BIT, 240 MHz, OTHER DSP, PQFP128
封裝： 14 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-128
文件頁數(shù)： 24/148頁
文件大?。?/td> 1420K
代理商： MC56F8345MFG60
24
56F8345 Technical Data
Preliminary
HOME1
(TB3)
(SS1)
(GPIOC3)
12
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input
Input
Input
Input
Home
— Quadrature Decoder 1, HOME input
TB3
— Timer B, Channel 3
SPI 1 Slave Select
— In the master mode, this pin is
used to arbitrate multiple masters. In slave mode, this pin
is used to select the slave. To activate the SPI function,
set the HOME_ALT bit in the SIM_GPS register. See
Section 6.5.8 GPIO Peripheral Select Register
(SIM_GPS)
for details.
Port C GPIO
— This GPIO pin can be individually
programmed as input or output pin.
After reset, the default state is HOME1.
To deactivate the internal pull-up resistor, clear bit 3 in the
GPIOC_PUR register.
PWMA0
58
Output
Tri-State
PWMA0 - 5
— These are six PWMA output pins.
PWMA1
60
PWMA2
61
PWMA3
63
PWMA4
64
PWMA5
66
ISA0
(GPIOC8)
104
Schmitt
Input
Schmitt
Input/
Output
Input
Input
ISA0 - 2
— These three input current status pins are used
for top/bottom pulse width correction in complementary
channel operation for PWMA.
Port C GPIO
— These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISA functionality.
To deactivate the internal pull-up resistor, clear the
appropriate bit of the GPIOC_PUR register. See
Section
6.5.6 SIM Pull-up Disable Register (SIM_PUDR)
for
details.
ISA1
(GPIOC9)
105
ISA2
(GPIOC10)
106
Table 2-2 56F8345 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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