參數(shù)資料
型號: MC33972
廠商: Motorola, Inc.
英文描述: Multiple Switch Detection Interface with Suppressed Wake-Up
中文描述: 多交換檢測接口,具有抑制喚醒
文件頁數(shù): 18/28頁
文件大?。?/td> 506K
代理商: MC33972
33972
18
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Example of Normal Mode Operation
The operation of the device in Normal Mode is defined by the
states of the programmable internal control registers. A typical
application may have the following settings:
Programmable Switch – Set to Switch-to-Ground
All Inputs Set as Wake-Up
Wetting Current On (16 mA)
Wetting Current Timer On (20 ms)
All inputs Tri-State-Disabled (comparator is active)
Analog select 00000 (no input channel selected)
With the device programmed as above, an interrupt will be
generated with each switch contact change of state (open-to-
close or close-to-open) and 16 mA of contact wetting current
will be source for 20 ms. The
INT
terminal will remain LOW until
switch status is acknowledged by the microprocessor. It is
critical to understand
INT
will not be cleared on the rising edge
of
CS
if a switch closure occurs while
CS
is LOW. The maximum
duration a switch state change can exist without
acknowledgement depends on the software response time to
the interrupt.
Figure 4
, page 8, shows the interaction between
changing input states and the
INT
and
CS
terminals.
If desired the user may disable interrupts (
wake up/interrupt
command
) from the 33972 device and read the switch states on
a periodic basis. Switch activation and deactivation faster than
the MCU read rate will not be acknowledged.
The 33972 device will exit the Normal mode and enter the
Sleep mode only with a valid sleep command.
Sleep Mode
Sleep mode is used to reduce system quiescent currents.
Sleep mode may be entered only by sending the
sleep
command.
All register settings programmed in Normal mode
will be maintained in Sleep mode.
The 33972 will exit Sleep mode and enter Normal mode
when any of the following events occur:
Input Switch Change of State (when enabled)
Interrupt Timer Expire
Falling Edge of
WAKE
Falling Edge of
INT
(with V
DD
= 5.0 V and
WAKE
at
Logic [1])
Falling Edge of
CS
(with V
DD
= 5.0 V)
Power-ON Reset (POR)
The V
DD
supply may be removed from the device during
Sleep mode. However removing V
DD
from the device in Sleep
mode will disable a wake-up from falling edge of
INT
and
CS
.
Note
In cases where
CS
is used to wake the device, the first
SO data message is not valid.
The sleep command contains settings for two programmable
timers for Sleep mode, the interrupt timer and the scan timer, as
shown in
Table 13
The interrupt timer is used as a periodic
wake-up timer. When the timer expires, an interrupt is
generated and the device enters Normal mode.
Note
The interrupt timer in the 33972 device may be
disabled by programming the interrupt bits to logic [1 1 1].
Table 14
shows the programmable settings of the Interrupt
timer.
Table 13. Sleep Command
Sleep Command
Command Bits
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
1
1
0
0
X
X
X
X
X
X
X
X
X
X
i
i
i
s
s
s
Table 14. Interrupt Timer
Bits 543
Interrupt Period
000
32 ms
001
64 ms
010
128 ms
011
256 ms
100
512 ms
101
1.024 s
110
2.048 s
111
No interrupt wake-up
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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