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參數(shù)資料
| 型號： | MC10H640 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 68030/040 PECL to TTL Clock Driver(68030/040 PECL 到 TTL時鐘驅(qū)動器) |
| 中文描述： | 040分之68030PECL的與TTL時鐘驅(qū)動器（040分之68030PECL的到的TTL時鐘驅(qū)動器） |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 123K |
| 代理商： | MC10H640 |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 4
1
Publication Order Number:
MC10H640/D
The MC10H/100H640 generates the necessary clocks for the
68030, 68040 and similar microprocessors. It is guaranteed to meet the
clock specifications required by the 68030 and 68040 in terms of
part–to–part skew, within–part skew and also duty cycle skew.
The user has a choice of using either TTL or PECL (ECL referenced
to +5.0V) for the input clock. TTL clocks are typically used in present
MPU systems. However, as clock speeds increase to 50MHz and
beyond, the inherent superiority of ECL (particularly differential
ECL) as a means of clock signal distribution becomes increasingly
evident. The H640 also uses differential PECL internally to achieve its
superior skew characteristic.
The H640 includes divide–by–two and divide–by–four stages, both
to achieve the necessary duty cycle skew and to generate MPU clocks
as required. A typical 50MHz processor application would use an
input clock running at 100MHz, thus obtaining output clocks at
50MHz and 25MHz (see Logic Diagram).
The 10H version is compatible with MECL 10H
ECL logic levels,
while the 100H version is compatible with 100K levels (referenced
to +5.0V).
Generates Clocks for 68030/040
Meets 030/040 Skew Requirements
TTL or PECL Input Clock
Extra TTL and PECL Power/Ground Pins
Asynchronous Reset
Single +5.0V Supply
Function
Reset (R):
LOW on RESET forces all Q outputs LOW and all Q
outputs HIGH.
Power–Up:
The device is designed to have the POS edges of the
÷
2
and
÷
4 outputs synchronized at power up.
Select (SEL):
LOW selects the ECL input source (DE/DE). HIGH
selects the TTL input source (DT).
The H640 also contains circuitry to force a stable state of the ECL
input differential pair, should both sides be left open. In this case, the
DE side of the input is pulled LOW, and DE goes HIGH.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10H640FN
PLCC–28
37 Units/Rail
MARKING
DIAGRAM
A
WL = Wafer Lot
YY
= Year
WW = Work Week
= Assembly Location
PLCC–28
FN SUFFIX
CASE 776
10H640
AWLYYWW
1
MC100H640FN
PLCC–28
37 Units/Rail
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10H640FN | 功能描述:時鐘驅(qū)動器及分配 PECL to TTL Clock RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H640FNG | 功能描述:時鐘驅(qū)動器及分配 BBG ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H640FNR2 | 功能描述:時鐘驅(qū)動器及分配 PECL to TTL Clock RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H640FNR2G | 功能描述:時鐘驅(qū)動器及分配 PECL to TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H641FN | 功能描述:轉(zhuǎn)換 - 電壓電平 5V PECL to TTL 1:9 RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
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