參數(shù)資料
型號: MC-10118BF1-ENY-A
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA481
封裝: 12.70 X 12.70 MM, PLASTIC, FBGA-481
文件頁數(shù): 50/66頁
文件大?。?/td> 3663K
代理商: MC-10118BF1-ENY-A
MC-10118B
Data Sheet R19DS0008EJ0700
52
2.5.11 SPI interface
(1) Master mode
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Common to SP0, SP1, and SP2
SPx_CLK output cycle
tC
40
ns
SPx_CLK high-level width
tWH
16
ns
SPx_CLK low-level width
tWL
16
ns
SPx_CLK rise time
tR
20 to 80%
4
ns
SPx_CLK fall time
tF
80 to 20%
4
ns
SP0
SP0_SI setup time
tSU0
Rising and falling edges of
SP0_CLK
12
ns
SP0_SI hold time
tH0
Rising and falling edges of
SP0_CLK
0
ns
SP0_SO delay time
tDO0
Rising and falling edges of
SP0_CLK
0
12
ns
SP1
SP1_SI setup time
tSU1
Rising and falling edges of
SP1_CLK
12
ns
SP1_SI hold time
tH1
Rising and falling edges of
SP1_CLK
0
ns
SP1_SO delay time
tDO1
Rising and falling edges of
SP1_CLK
0
12
ns
SP2
SP2_SI setup time
tSU2
Rising and falling edges of
SP2_CLK
12
ns
SP2_SI hold time
tH2
Rising and falling edges of
SP2_CLK
0
ns
SP2_SO delay time
tDO2
Rising and falling edges of
SP2_CLK
0
12
ns
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