參數(shù)資料
型號： MB9AF312LPMC1
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 67/114頁
文件大小： 1357K
代理商： MB9AF312LPMC1
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
56
Table 12-5 shows reset and interrupt vectors placement for the various combinations of BOOTRST and IVSEL settings. If the
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed at
these locations. This is also the case if the reset vector is in the application section while the interrupt vectors are in the boot
section or vice versa.
The most typical and general program setup for the reset and interrupt vector addresses in the Atmel ATmega168PA is:
Address Labels
Code
Comments
0x0000
jmp
RESET
; Reset Handler
0x0002
jmp
EXT_INT0
; IRQ0 Handler
0x0004
jmp
EXT_INT1
; IRQ1 Handler
0x0006
jmp
PCINT0
; PCINT0 Handler
0x0008
jmp
PCINT1
; PCINT1 Handler
0x000A
jmp
PCINT2
; PCINT2 Handler
0x000C
jmp
WDT
; Watchdog Timer Handler
0x000E
jmp
TIM2_COMPA
; Timer2 Compare A Handler
0x0010
jmp
TIM2_COMPB
; Timer2 Compare B Handler
0x0012
jmp
TIM2_OVF
; Timer2 Overflow Handler
0x0014
jmp
TIM1_CAPT
; Timer1 Capture Handler
0x0016
jmp
TIM1_COMPA
; Timer1 Compare A Handler
0x0018
jmp
TIM1_COMPB
; Timer1 Compare B Handler
0x001A
jmp
TIM1_OVF
; Timer1 Overflow Handler
0x001C
jmp
TIM0_COMPA
; Timer0 Compare A Handler
0x001E
jmp
TIM0_COMPB
; Timer0 Compare B Handler
0x0020
jmp
TIM0_OVF
; Timer0 Overflow Handler
0x0022
jmp
SPI_STC
; SPI Transfer Complete Handler
0x0024
jmp
USART_RXC
; USART, RX Complete Handler
0x0026
jmp
USART_UDRE
; USART, UDR Empty Handler
0x0028
jmp
USART_TXC
; USART, TX Complete Handler
0x002A
jmp
ADC
; ADC Conversion Complete Handler
0x002C
jmp
EE_RDY
; EEPROM Ready Handler
0x002E
jmp
ANA_COMP
; Analog Comparator Handler
0x0030
jmp
TWI
; 2-wire Serial Interface Handler
0x0032
jmp
SPM_RDY
; Store Program Memory Ready Handler
;
0x0033 RESET:
ldi
r16, high(RAMEND); Main program start
0x0034
out
SPH,r16
; Set Stack Pointer to top of RAM
0x0035
ldi
r16, low(RAMEND)
0x0036
out
SPL,r16
0x0037
sei
; Enable interrupts
0x0038
<instr> xxx
...
Table 12-5. Reset and Interrupt Vectors Placement in the Atmel ATmega168PA(1)
BOOTRST
IVSEL
Reset Address
Interrupt Vectors Start Address
1
0
0x000
0x002
1
0x000
Boot reset address + 0x0002
0
Boot reset address
0x002
0
1
Boot reset address
Boot reset address + 0x0002
Note:
1.
The boot reset address is shown in Table 27-7 on page 247. For the BOOTRST fuse “1” means unpro-
grammed while “0” means programmed.
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