![](http://datasheet.mmic.net.cn/30000/MB91F467PAPMC-GSE2_datasheet_2367824/MB91F467PAPMC-GSE2_102.png)
MB91460P Series
102
DS07-16615-2E
8.3.
Security Vector DFSV2
The setting of the Flash Security Vector DFSV2 bits [15:0] is responsible for the individual write protection of
the Data Flash sectors. It is only evaluated if write protection bit DFSV1 [1] is set.
Explanation of the bits in the Flash Security Vector DFSV2[15:0]
Note : It is mandatory to always set the sector where the Flash Security Vectors DFSV1 and DFSV2 are located to
write protected (here sector SAS). Otherwise it is possible to overwrite the Security Vector to a setting where
it is possible to either read out the Flash content or manipulate data by writing.
the Flash Memory.
8.4.
Data Flash Security Registers
The Data Flash Security module can be used to calculate a CRC over the Data Flash contents. And it is possible
to force a security vector re-fetch by using the following registers.
8.4.1.
DFSCR0 : Data Flash Security Control Register 0
Continuously writing “A5H”, “5AH” in the DFSCR0[31:24] register will start a Flash Security Vector Re-fetch
sequence immediately after writing “5AH”. There is no time restrictions between “A5H” and “5AH”, but if “A5H” is
written followed by the one other than “5AH”, it must be written “A5H” again. If not, the Re-Fetch sequence
cannot be started even if “5AH” is written.
Continuously writing “F0H”, “0FH” in the DFSCR0[31:24] register will start a CRC32 checksum sequence im-
mediately after writing “0FH”. There is no time restrictions between “F0H” and “0FH”, but if “F0H” is written followed
by the one other than “0FH”, it must be written “F0H” again. If not, the CRC checksum sequence cannot be
started even if “0FH” is written.
DFSV2 bit
Sector
Enable Write
Protection
Disable Write
Protection
Comment
DFSV2[0]
SA0
set to “0”
set to “1”
DFSV2[1]
SA1
set to “0”
set to “1”
DFSV2[2]
SA2
set to “0”
set to “1”
DFSV2[3]
SA3
set to “0”
set to “1”
DFSV2[7:4]
sectors not available
DFSV2[8]
SAS
set to “0”
write protection is mandatory!
DFSV2[15:9]
sectors not available
Address
31:24
23:16
15:8
7:0
bit
07118H
S[7:0]
CRC[31:24]
CRC[23:0]
1111 1111
Initial
value
W, R
RRR
Attribute
S[7:0]
Sequence Activation
0xA5 --> 0x5A
Start of a Flash Security Vector Re-Fetch Sequence (write only)
0xF0 --> 0x0F
Start of a Flash Memory CRC32 Checksum Sequence (write only)