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MB91460P Series
2
DS07-16615-2E
2.
Internal peripheral resources
General-purpose ports : Maximum 141 ports
DMAC (DMA Controller)
Maximum of 5 channels able to operate simultaneously
2 transfer sources (internal peripheral/software)
Activation source can be selected using software
Addressing mode specifies full 32-bit addresses (increment/decrement/fixed)
Transfer mode (demand transfer/burst transfer/step transfer/block transfer)
Transfer data size selectable from 8/16/32-bit
Multi-byte transfer enabled (by software)
DMAC descriptor in I/O areas (200H to 240H, 1000H to 1024H)
A/D converter (successive approximation type)
10-bit resolution: maximum 41 channels *
Conversion time: minimum 1 ms
External interrupt inputs : 16 channels *
9 channels shared with CAN RX or I2C pins
Bit search module (for REALOS)
Function to search the first bit position of ‘’1’’, ‘’0’’, ‘’changed’’ from the MSB (most significant bit) within one word
LIN-USART (full duplex double buffer): 12 channels, 4 channels with FIFO *
Clock synchronous/asynchronous selectable
Sync-break detection
Internal dedicated baud rate generator
I2C bus interface (supports 400 kbps): 4 channels
Master/slave transmission and reception
Arbitration function, clock synchronization function
CAN controller (C-CAN): up to 4 channels
Maximum transfer speed: 1 Mbps
32 transmission/reception message buffers
Sound generator : 1 channel
Tone frequency : PWM frequency divide-by-two (reload value + 1)
16-bit PPG timer : 32 channels *
16-bit PFM timer : 1 channel
16-bit reload timer: 16 channels
8 reload timers can be used as up to 4 32-bit reload timers (by cascading 2 reload timers each).
16-bit free-run timer: 8 channels (1 channel each for ICU and OCU)
Input capture: 8 channels (operates in conjunction with the free-run timer)
Output compare: 8 channels (operates in conjunction with the free-run timer)
Up/Down counter: 4 channels (4*8-bit or 2*16-bit) *
Watchdog timer
Real-time clock
Low-power consumption modes : Sleep/stop mode function
Low voltage detection circuit
Note: * The maximum channel count is given; the real number depends on port multiplexing.
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