參數(shù)資料
型號： MB91F345BPFT-GE1
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 12 X 12 MM, 1.20 MM HEIGHT, 0.40 MM PITCH, PLASTIC, TQFP-100
文件頁數(shù)： 21/72頁
文件大?。?/td> 657K
代理商： MB91F345BPFT-GE1
MB91345 Series
28
SCR (System Condition code Register)
Flag for step dividing
Stores intermediate data for stepwise multiplication operations.
Step trace trap flag
A flag specifying whether the step trace trap function is enabled or not.
Emulator uses step trace trap function. The function cannot be used by the user program when using the
emulator.
ILM (Interrupt Level Mask Register)
This register stores the interrupt level mask value. The value in the ILM register is used as the level mask.
Initialized to “15” (01111B) by a reset.
PC (Program Counter)
The program counter contains the address of the instruction currently being executed.
The initial value after a reset is indeterminate.
TBR (Table Base Register)
The table base register contains the start address of the vector table used for servicing EIT events.
The initial value after a reset is 000FFC00H.
I
: Interrupt Enable flag. Cleared to “0” at a reset.
N : Negative flag. Initial State at a reset is unspecified.
Z : Zero flag. Initial State at a reset is unspecified.
V : Overflow flag. Initial State at a reset is unspecified.
C : Carry flag. Initial State at a reset is unspecified.
Initial Value
XX0B
bit10 bit9
bit8
D1
D0
T
Initial Value
01111B
bit20 bit19 bit18 bit17 bit16
ILM4 ILM3 ILM2 ILM1 ILM0
Initial Value
XXXXXXXXH
bit31
bit0
Initial Value
000FFC00 H
bit31
bit0
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