參數(shù)資料
型號(hào)： MB91267NAPMC
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64
文件頁(yè)數(shù)： 55/56頁(yè)
文件大?。?/td> 473K
代理商： MB91267NAPMC
MB91265A Series
8
(Continued)
Pin no.
Pin
name
I/O
Circuit
type*1
Description
37
DTTI
D
Control input signal of multi-function timer waveform generator output RTO0 to RTO5.
This function becomes valid when DTTI input is set to enabled.
P23
General purpose input/output port.
This function becomes valid when input of DTTI is set to disabled.
38
CKI
D
External clock input terminal of free-run timer.
Since this input is used as required while the port is used for external clock input
terminal of free-run timer, the port output must remain off unless intentionally used.
P24
General purpose input/output port.
This function becomes valid when external clock input of free-run timer is set to
disabled.
39
IC0
D
Trigger input terminal of input capture 0.
The port can serve as an input when set for input with the setting of the trigger input of
input capture 0. When the port is used for input capture input, this input is used as
required. The port output must therefore remain off unless intentionally used.
P25
General purpose input/output port.
This function becomes valid when trigger input of input capture 0 is set to disabled.
40
IC1
D
Trigger input terminal of input capture 1.
The port can serve as an input when set for input with the setting of the trigger input of
input capture 1. When the port is used for input capture input, this input is used as
required. The port output must therefore remain off unless intentionally used.
P26
General purpose input/output port.
This function becomes valid when trigger input of input capture 1 is set to disabled.
41
P27
D
General purpose input/output port.
42
PPG0
D
Output terminal of PPG timer 0.
This function becomes valid when output of PPG timer 0 is set to enabled.
PG1
General purpose input/output port.
This function becomes valid when output of PPG timer 0 is set to disabled.
43
MD2
H, K
Mode terminal 2.
Setting this pin determines the basic operation mode. Connect to VCC or VSS.
The circuit type of flash memory models is K.
44
MD1
H, K
Mode terminal 1.
Setting this pin determines the basic operation mode. Connect to VCC or VSS.
The circuit type of flash memory models is K.
45
MD0
H
Mode terminal 0.
Setting this pin determines the basic operation mode. Connect to VCC or VSS.
46
X0
A
Clock (oscillation) input terminal.
47
X1
A
Clock (oscillation) output terminal.
49
PPG4
D
Output terminal of PPG timer 4.
This function becomes valid when output of PPG timer 4 is set to enabled.
P37
General purpose input/output port.
This function becomes valid when output of PPG timer 4 is set to disabled.
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