519
APPENDIX B Overview of Instructions
therefore care must be taken when a branch may occur depending on the result of a
multiplication.
Figure B.3-3 "MULU" shows a summary of the instruction.
Figure B.3-3 MULU
H
DIVU A
This instruction divides the 16-bit value in T by the unsigned 8-bit value in AL, and stores the 8-
bit result and the 8-bit remainder in AL and TL, respectively. A value of 0 is set to both AH and
TH. The contents of AH before execution of the instruction are not used for the operation. An
unpredictable result is produced from data that results in more than eight bits. In addition, there
is no indication of the result having more than eight bits. Therefore, if it is likely that data will
cause a result of more than eight bits, the data must be checked to ensure that the result will not
have more than eight bits before it is used.
The instruction does not change the flags, and therefore care must be taken when a branch
may occur depending on the result of a division.
Figure B.3-4 "DIVU A" shows a summary of the instruction.
Figure B.3-4 DIVU A
H
XCHW A, PC
This instruction swaps the contents of A and PC, resulting in a branch to the address contained
in A before execution of the instruction. After the instruction is executed, A contains the address
that follows the address of the operation code of MOVW A, PC. This instruction is effective
especially when it is used in the main routine to specify a table for use in a subroutine.
Figure B.3-5 "XCHW A, PC" shows a summary of the instruction.
Figure B.3-5 XCHW A, PC
After the XCHW A, PC instruction is executed, A contains the address of the operation code of
the next instruction, rather than the address of the operation code of XCHW A, PC.
Accordingly, Figure B.3-5 "XCHW A, PC" shows that A contains 1235
H
, which is the address of
the operation code of the instruction that follows XCHW A, PC. This is why 1235
H
is stored
instead of 1234
H.
1 2 3 4
H
A
T
1 8 6 0
H
A
T
(Before execution)
(After execution)
1 2 3 4
H
5 6 7 8
H
1 8 6 2
H
A
T
0 0 3 4
H
A
T
(Before execution)
(After execution)
0 0 0 2
H
5 6 7 8
H
1 2 3 4
H
A
PC
1 2 3 5
H
A
PC
(Before execution)
(After execution)
5 6 7 8
H
5 6 7 8
H