Maxim Integrated Products 16
MAXQ618
16-Bit Microcontroller with Infrared Module
IR Receive
When configured in receive mode (IRMODE = 0), the
IR hardware supports the IRRX capture function. The
IRRXSEL[1:0] bits define which edge(s) of the IRRX pin
should trigger the IR timer capture function.
The IR module starts operating in the receive mode when
IRMODE = 0 and IREN = 1. Once started, the IR timer
(IRV) starts up counting from 0000h when a qualified
capture event as defined by IRRXSEL happens. The IRV
register is, by default, counting carrier cycles as defined
by the IRCA register. However, the IR carrier frequency
detect (IRCFME) bit can be set to 1 to allow clocking of
the IRV register directly with the IRCLK for finer resolu-
tion. When IRCFME = 0, the IRCA defined carrier is
counted by IRV. When IRCFME = 1, the IRCLK clocks
the IRV register.
On the next qualified event, the IR module does the
following:
1) Captures the IRRX pin state and transfers its value to
IRDATA. If a falling edge occurs, IRDATA = 0. If a ris-
ing edge occurs, IRDATA = 1.
2) Transfers its current IRV value to the IRMT.
3) Resets IRV content to 0000h (if IRXRL = 1).
4) Continues counting again until the next qualified event.
If the IR timer value rolls over from 0FFFFh to 0000h
before a qualified event happens, the IR timer overflow
(IROV) flag is set to 1 and an interrupt is generated, if
enabled. The IR module continues to operate in receive
mode until it is stopped by switching into transmit mode
(IRMODE = 1) or clearing IREN = 0.
Carrier Burst-Count Mode
A special mode reduces the CPU processing burden
when performing IR learning functions. Typically, when
operating in an IR learning capacity, some number of
carrier cycles are examined for frequency determina-
tion. Once the frequency has been determined, the IR
receive function can be reduced to counting the number
of carrier pulses in the burst and the duration of the
combined mark-space time within the burst. To simplify
this process, the receive burst-count mode (as enabled
by the RXBCNT bit) can be used. When RXBCNT = 0,
the standard IR receive capture functionality is in place.
When RXBCNT = 1, the IRV capture operation is dis-
abled and the interrupt flag associated with the capture
no longer denotes a capture. In the carrier burst-count
mode, the IRMT register only counts qualified edges.
The IRIF interrupt flag (normally used to signal a capture
when RXBCNT = 0) now becomes set if two IRCA cycles
elapse without getting a qualified edge. The IRIF interrupt
flag thus denotes absence of the carrier and the begin-
ning of a space in the receive signal. When the RXBCNT
bit is changed from 0 to 1, the IRMT register is set to
0001h. The IRCFME bit is still used to define whether the
IRV register is counting system IRCLK clocks or IRCA-
defined carrier cycles. The IRXRL bit defines whether
the IRV register is reloaded with 0000h on detection of
Figure 5. IR Capture
0
1
0000h
IRV
CARRIER MODULATION
CARRIER GENERATION
IRCLK
IRCFME
IRCAL + 1
IRCAH + 1
INTERRUPT TO CPU
IRDATA
IRRX PIN
RESET IRV TO 0000h
IR TIMER OVERFLOW
IR INTERRUPT
IRXRL
COPY IRV TO IRMT
ON EDGE DETECT
EDGE DETECT