參數(shù)資料
型號: MAX9789CETJ+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC AMP AUDIO 2W STER AB 32TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
系列: DirectDrive®
類型: AB 類
輸出類型: 2-通道(立體聲)帶立體聲耳機(jī)
在某負(fù)載時最大輸出功率 x 通道數(shù)量: 2W x 2 @ 4 歐姆; 100mW x 2 @ 16 歐姆
電源電壓: 4.5 V ~ 5.5 V
特點(diǎn): 消除爆音,靜音,短路保護(hù)和熱保護(hù),關(guān)機(jī)
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 32-TQFN-EP(5x5)
封裝/外殼: 32-WFQFN 裸露焊盤
包裝: 帶卷 (TR)
MAX9789/MAX9790
Windows Vista-Compliant, Stereo Class AB Speaker
Amplifiers and DirectDrive Headphone Amplifiers
______________________________________________________________________________________
19
Headphone Amplifier Power-Supply
Input (HPVDD and PVSS)
The headphone amplifiers are powered from HPVDD
and PVSS. HPVDD is the positive supply of the head-
phone amplifiers and ranges from 3.0V to 5.5V. Bypass
HPVDD with a 10F capacitor to PGND. PVSS is the
negative supply of the headphone amplifiers. Bypass
PVSS with a 1F capacitor to PGND. Connect PVSS to
CPVSS. The charge pump is powered by CPVDD.
CPVDD ranges from 3.0V to 5.5V and should be the
same potential as HPVDD. Bypass CPVDD with a 1F
capacitor to PGND. The charge pump inverts the volt-
age at CPVDD, and the resulting voltage appears at
CPVSS. A 1F capacitor must be connected between
C1N and C1P.
Power Supply and LDO Input (VDD)
The internal LDO and the remainder of the device is
powered by VDD. VDD ranges from 4.5V to 5.5V.
Bypass VDD with a 0.1F capacitor to GND and two
1F capacitors in parallel to GND. Note additional bulk
capacitance is required at the device if long input
traces between VDD and the power source are used.
Input Filtering
The input capacitor (CIN), in conjunction with the ampli-
fier input resistance (RIN), forms a highpass filter that
removes the DC bias from the incoming signal. The AC-
coupling capacitor allows the amplifier to bias the sig-
nal to an optimum DC level. Assuming zero source
impedance, the -3dB point of the highpass filter is
given by:
RIN is the amplifier’s internal input resistance value
given in the
Electrical Characteristics. Choose CIN such
that f-3dB is well below the lowest frequency of interest.
Setting f-3dB too high affects the amplifier’s low fre-
quency response. Use capacitors with adequately low
voltage coefficient dielectrics, such as 1206-sized X7R
ceramic capacitors. Capacitors with higher voltage
coefficients result in increased distortion at low fre-
quencies (see Figure 7).
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, CBIAS improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker and headphone
amplifiers. Bypass BIAS with a 1F capacitor to GND.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for opti-
mum performance. Low ESR ceramic capacitors mini-
mize the output resistance of the charge pump. For
best performance over the extended temperature
range, select capacitors with an X7R dielectric.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the load
regulation and output resistance of the charge pump. A
C1 value that is too small degrades the device’s ability
to provide sufficient current drive, which leads to a loss
of output voltage. Connect a 1F capacitor between
C1P and C1N.
f
RC
dB
IN IN
=
3
1
2
π
INPUT COUPLING CAPACITOR-INDUCED THD+N
vs. FREQUENCY (HEADPHONE MODE)
FREQUENCY (Hz)
THD+N
(dB
FS)
100
-85
-80
-75
-70
-65
-60
-55
-50
-90
10
1000
0402 6.3V X5R 10% 1
μF
0603 10V X5R 10% 1
μF
0805 25V X7R 10% 1
μF
1206 25 X7R 10% 1
μF
VOUT = -3dB FS
FS = 1VRMS
RL = 32
Ω
Figure 7. Input Coupling Capacitor-Induced THD+N vs.
Frequency (Headphone Mode)
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