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Overvoltage Protection (OVP)
When the output voltage rises above 116% of the nomi-
nal regulation voltage and OVP is enabled (OVP/UVP =
AV
DD
or open), the OVP circuit sets the fault latch,
shuts down the PWM controller, and immediately pulls
DH low and forces DL high. This turns on the synchro-
nous-rectifier MOSFET (Q2 in the Typical Applications
Circuit of Figure 8) with a 100% duty cycle, rapidly dis-
charging the output capacitor and clamping the output
to ground. Once the output reaches 0.1V, DL is
switched off, preventing the possibility of a negative
voltage on the output. Toggle
SHDN
or cycle AV
DD
below 1V to clear the fault latch and restart the con-
troller. OVP is disabled when OVP/UVP is connected to
REF or GND (see Table 3). OVP only applies to the
buck output. The VTT and VTTR outputs do not have
overvoltage protection.
Undervoltage Protection (UVP)
When the output voltage drops below 70% of its regula-
tion voltage while UVP is enabled, the controller sets
the fault latch and begins the discharge mode (see the
SHDN
and Output Discharge
section). When the output
voltage drops to 0.1V, the synchronous rectifier (Q2 in
the
Typical Applications Circuit
) turns on and clamps
the buck output to GND. UVP is ignored for at least
10ms (min) after startup or after a rising edge on
SHDN
. Toggle
SHDN
or cycle AV
DD
power below 1V to
clear the fault latch and restart the controller. UVP is
disabled when OVP/UVP is left open or connected to
GND (see Table 3). UVP only applies to the buck out-
put. The VTT and VTTR outputs do not have undervolt-
age protection.
Thermal Fault Protection
The MAX8632 features two thermal-fault-protection cir-
cuits. One monitors the buck-regulator portion of the IC
and the other monitors the linear regulator (VTT) and
the reference buffer output (VTTR). When the junction
temperature of the buck-regulator portion of the
MAX8632 rises above +160°C, a thermal sensor acti-
vates the fault latch, pulls POK1 low, and shuts down
the buck-controller output using discharge mode
regardless of the OVP/UVP setting. Toggle
SHDN
or
cycle AV
DD
below 1V to reactivate the controller after
the junction temperature cools by 15°C. If the VTT and
VTTR regulator portion of the IC has its die temperature
rise above +160
°
C, then VTT and VTTR shut off, go
high impedance, and restart after the die portion of the
IC cools by 15
°
C. Both thermal faults are independent.
For example, if the VTT output is overloaded to the
point that it triggers its thermal fault, the buck regulator
continues to function.
Design Procedure
Firmly establish the input voltage range (V
IN
) and maxi-
mum load current (I
LOAD
) in the buck regulator before
choosing a switching frequency and inductor operating
point (ripple current ratio or LIR). The primary design
trade-off lies in choosing a good switching frequency
and inductor operating point, and the following four fac-
tors dictate the rest of the design:
Input Voltage Range. The maximum value (V
IN(MAX)
)
must accommodate the worst-case voltage. The mini-
mum value (V
IN(MIN)
) must account for the lowest
voltage after drops due to connectors and fuses. If
there is a choice, lower input voltages result in better
efficiency.
M
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
______________________________________________________________________________________
17
Table 3. OVP/UVP Fault Protection
OVP/UVP
DISCHARGE
UVP PROTECTION
OVP PROTECTION
AV
DD
Yes.
Output is discharged through an
internal 10
resistance.
Enabled
Enabled
OPEN
Yes.
Output is discharged through an
internal 10
resistance.
Disabled
Enabled
REF
No.
DL forced low when
SHDN
is low.
Enabled
Disabled
GND
No.
DL forced low when
SHDN
is low.
Disabled
Disabled