參數(shù)資料
型號: MAX6876ETX+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, QCC36
封裝: 6 X 6 MM, 0.80 MM HEIGHT, MO-220WJJD-1, TQFN-36
文件頁數(shù): 22/39頁
文件大?。?/td> 425K
代理商: MAX6876ETX+
MAX6876
EEPROM-Programmable, Quad,
Power-Supply Tracker/Sequencer Circuit
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29
8) The master sends a stop condition or sends another
8-bit data byte.
9) The addressed slave asserts an ACK on SDA.
10) The master sends a stop condition.
To write a single byte to the register bank, only the 8-bit
command code and a single 8-bit data byte are sent.
The command code must be in the range of 00h to 13h
to write on RAM or 20h to 33h to write on EEPROM. The
data byte is written to the register bank if the command
code is valid. The slave generates a NACK at step 5 if
the command code is invalid.
Block Write
The block write protocol allows the master device to
write a block of data (1 to 16 bytes) to the EEPROM or
to the register bank (see Figure 15). The destination
address must already be set by the send byte or write
byte protocol. If the number of bytes to be written caus-
es the address pointer to exceed 13h for the configura-
tion register (or 33h for the configuration EEPROM), the
address pointer stays at 13h (or 33h), overwriting this
memory address with the remaining bytes of data. The
last data byte sent is stored at register address 13h (or
33h). The block write procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends the 8-bit command code for
block write (83h).
5) The addressed slave asserts an ACK on SDA.
6) The master sends the 8-bit byte count (1 to 16
bytes), N.
7) The addressed slave asserts an ACK on SDA.
8) The master sends 8 bits of data.
9) The addressed slave asserts an ACK on SDA.
10) Repeat steps 8 and 9 N - 1 times.
11) The master generates a stop condition.
Block Read
The block read protocol allows the master device to
read a block of 16 bytes from the EEPROM or register
bank (see Figure 15). Read fewer than 16 bytes of data
by issuing an early STOP condition from the master, or
by generating a NACK with the master. The send byte
or write byte protocol predetermines the destination
address with a command code of C1h. The block read
procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends 8 bits of the block read com-
mand (C1h).
5) The slave asserts an ACK on SDA, unless busy.
SDA
SCL
1
MSB
LSB
START
01
0
A1
A0
XR/W
ACK
Figure 14. Slave Address
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