參數(shù)資料
型號(hào): MAX6876ETX+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 電源管理
英文描述: EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, QCC36
封裝: 6 X 6 MM, 0.80 MM HEIGHT, MO-220WJJD-1, TQFN-36
文件頁(yè)數(shù): 21/39頁(yè)
文件大小: 425K
代理商: MAX6876ETX+
MAX6876
EEPROM-Programmable, Quad,
Power-Supply Tracker/Sequencer Circuit
28
______________________________________________________________________________________
Slave Address
The MAX6876 slave address conforms to the following
table:
SA7–SA4 represent the standard 2-wire interface
address (1010) for devices with EEPROM. SA3 and
SA2 correspond to the A1 and A0 address inputs of the
MAX6876 (hardwired as logic low or logic high). SA0 is
a read/write flag bit (0 = write, 1 = read).
The A0 and A1 address inputs allow up to four
MAX6876s to connect to one bus. Connect A0 and A1
to GND or to HBP (see Figure 14).
Send Byte
The send byte protocol allows the master device to send
one byte of data to the slave device (see Figure 15). The
send byte presets a register pointer address for a sub-
sequent read or write. The slave sends a NACK instead
of an ACK if the master tries to send an address that is
not allowed. If the master sends C0h or C1h, the data is
ACK, because this could be the start of the write block
or read block. If the master sends a stop condition, the
internal address pointer does not change. If the master
sends C4h, this signifies a software reboot. The send
byte procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit data byte.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a stop condition.
Write Byte/Word
The write byte/word protocol allows the master device
to write a single byte in the register bank, preset an
EEPROM (configuration or user) address for a subse-
quent read, or to write a single byte to the configuration
EEPROM (see Figure 15). The write byte/word proce-
dure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit command code.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
SCL
1
S
2
89
SDA BY
TRANSMITTER
SDA BY
RECEIVER
START
CONDITION
CLOCK PULSE FOR ACKNOWLEDGE
Figure 13. Acknowledge
SA7
(MSB)
SA6
SA5
SA4
SA3
SA2
SA1
SA0
(LSB)
10
1
0
A1
A0
XR/W
X = Don’t care.
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