參數(shù)資料
型號: MAX5922AEUI+
廠商: Maxim Integrated
文件頁數(shù): 16/21頁
文件大?。?/td> 437K
描述: IC NETWORK PWR SW +48V 28-TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 50
類型: 以太網(wǎng)供電開關(PoE)
應用: 遠程外設(工業(yè)控制,相機,數(shù)據(jù)訪問)
內(nèi)部開關:
電源電壓: 32 V ~ 60 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 28-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1411 (CN2011-ZH PDF)
+48V, Single-Port Network Power Switch
For Power-Over-LAN
16   ______________________________________________________________________________________
output voltage slew rate at the OUT pin to dV
OUT
/dt =
100V/ms (max) and the output-current slew rate out of
the OUT pin to dI
OUT
/dt = 35A/ms (max).
The MAX5922 has an integrated 0.45& N-channel
power MOSFET. The MOSFETs drain is connected to
the DRAIN pin and its source is connected to the OUT
pin. The MAX5922 monitors and provides current-limit
protection to the load at all times. The current limit is
programmable using an external current-sensing resis-
tor connected from IN to DRAIN. To be compatible with
the IEE802.3af standard, use a 0.5& ?%, 50ppm/癈
resistor. The MAX5922 features current-limit foldback
and duty-cycle limit to ensure robust operation during
load-fault and short-circuit conditions (see the
Overcurrent Protection section).
When V
OUT
is within 750mV of V
IN
for more than
t
POK_HIGH
, POK goes open drain. Figure 6 shows a
typical startup sequence.
After POK is asserted, the MAX5922 activates the zero-
current detection function. This function monitors the
output for an undercurrent condition and eventually
turns off the power to the output if the PD is disconnect-
ed (see the Zero-Current Detection section).
Undervoltage Lockout (UVLO)
The MAX5922 operates from a +32V to +60V supply
voltage range and has a default UVLO set at +38V
(MAX5922A) or +28V (MAX5922B/MAX5922C). The
UVLO threshold is adjustable using a resistive-divider
connected to the UVLO pin (see Figure 7). When the
input voltage is below the UVLO threshold, all operation
stops and the MOSFET is held off. When the input volt-
age is above the UVLO threshold and EN is high, the
MAX5922 goes into operation. See Figures 2 and 4 for
the operational flow charts.
To adjust the UVLO threshold, connect an external
resistive-divider from IN to UVLO and then from UVLO
to AGND. Use the following equation to calculate the
new UVLO threshold:
V
REF
is typically 1.38V (MAX5922A) or 1.33V (MAX5922B/
MAX5922C). The UVLO pin input resistance is 50k&
(min), keep the R1 and R2 parallel combination value at
least 20 times smaller than 50k& to minimize the new
UVLO threshold error.
V
V
R
R
UVLO  TH
REF
_
 
=
+
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
1
1
2
t
POK_HIGH
, 88ms
t
DET2
, 88ms
t
DET1
, 88ms
t
CLASS
,
21.3ms
t
POK (OPEN-DRAIN)
0V
0
0V
+4V
+8V
+17.5V
+48V
V
IN
 CROSSES UVLO
100V/ms (max)
Figure 6. Startup Sequence
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