參數(shù)資料
型號(hào): MAX5922AEUI+
廠商: Maxim Integrated
文件頁數(shù): 11/21頁
文件大?。?/td> 437K
描述: IC NETWORK PWR SW +48V 28-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類型: 以太網(wǎng)供電開關(guān)(PoE)
應(yīng)用: 遠(yuǎn)程外設(shè)(工業(yè)控制,相機(jī),數(shù)據(jù)訪問)
內(nèi)部開關(guān):
電源電壓: 32 V ~ 60 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1411 (CN2011-ZH PDF)
+48V, Single-Port Network Power Switch
For Power-Over-LAN
______________________________________________________________________________________   11
PIN
NAME
FUNCTION
21
ZC_EN
Zero-Current-Detection Enable Logic Input. Referenced to DGND. Connect ZC_EN to a logic high to
enable the zero-current detection circuitry. Connect ZC_EN to a logic low to disable this function.
22
EN
ON/OFF Control-Logic Input. Referenced to DGND. Connect to a logic high to enable the device.
Connect to a logic low to disable the device and reset a latched-off condition.
23
V
DIG
Digital Supply Voltage. V
DIG
 is the supply voltage for the internal digital logic circuity. EN, LATCH,
CLASS, DET_DIS, DCA, and ZC_EN input logic thresholds are automatically scaled to the voltage on
V
DIG
. See the Typical Application Circuit for proper filtering.
24
CLASS
Classification Enable Digital Input. Connect to DGND to disable the classification function. Connect to
V
DIG
 to enable the classification function.
DET_DIS
PD Detection Disable Logic Input. When DET_DIS is connected to a logic high, the part skips the
detection and classification (regardless of the status of CLASS) phases and powers on immediately
after EN = high (MAX5922B/MAX5922C only).
25
DCA
Detection Collision Avoidance Logic Input. Connect to a logic high to activate the detection collision
avoidance circuitry for midspan system. Connect to DGND to disable this function. (MAX5922A only).
See the Detection Collision Avoidance section.
27, 28
OUT
Output Voltage
Pin Description (continued)
CLASS
POK
VDIG
EN
LATCH
ZC_EN
DCA
CL2
CL1
CL0
DGND
N
N
N
N
N
N
ZC
FAULT
LOGIC-
LEVEL
TRANSLATOR
LOGIC
CONTROL
ANALOG
CONTROL
VOLTAGE
REGULATOR
OSC
DETECTION
AND
CLASSIFICATION
CIRCUITRY
CHARGE
PUMP
N
IN
CSP
DRAIN
OUT
UVLO
RCL
RDT
AGND
MAX5922
Figure 1. MAX5922 Block Diagram
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