參數(shù)資料
型號： MAX5887
廠商： Maxim Integrated Products, Inc.
英文描述： 3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
中文描述： 3.3V、14位、500Msps、高動態(tài)性能DAC，差分LVDS輸入
文件頁數(shù)： 4/18頁
文件大?。?/td> 982K
代理商： MAX5887
M
3.3V, 14-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
REFIO
= 1.25V, differential transformer-coupled
analog output, 50
double terminated (Figure 7), I
OUT
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥
+25°C guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Data Latency
4
Clock
cycles
ns
ns
Minimum Clock Pulse Width High
Minimum Clock Pulse Width Low
LVDS LOGIC INPUTS (B0N–B13N, B0P–B13P)
Differential Input Logic High
Differential Input Logic Low
Common-Mode Voltage Range
Differential Input Resistance
Input Capacitance
CMOS LOGIC INPUTS (PD, SEL0)
t
CH
t
CL
CLKP, CLKN
CLKP, CLKN
0.9
0.9
V
IH
V
IL
V
COM
R
IN
C
IN
100
mV
mV
V
-100
1.375
125
1.125
85
100
5
pF
Input Logic High
V
IH
0.7
DV
DD
V
Input Logic Low
V
IL
0.3
DV
DD
+15
V
Input Leakage Current
Input Capacitance
CLOCK INPUTS (CLKP, CLKN)
I
IN
C
IN
-15
μA
pF
5
Sine wave
Square wave
(Note 5)
≥
1.5
≥
0.5
>100
Differential Input Voltage Swing
V
CLK
V
P-P
Differential Input Slew Rate
SR
CLK
V/μs
Common-Mode Voltage Range
V
COM
1.5
±
20%
5
5
V
Input Resistance
Input Capacitance
POWER SUPPLIES
Analog Supply Voltage Range
Digital Supply Voltage Range
Clock Supply Voltage Range
R
CLK
C
CLK
k
pF
AV
DD
DV
DD
V
CLK
3.135
3.135
3.135
3.3
3.3
3.3
27
0.3
6.4
10
5.5
10
3.465
3.465
3.465
V
V
V
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
Analog Supply Current
I
AVDD
mA
mA
μA
mA
μA
Digital Supply Current
I
DVDD
Clock Supply Current
I
VCLK
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