MAX5866

Using Op-Amp Coupling

Drive the MAX5866 ADCs with op amps when a balun

transformer is not available. Figures 9 and 10 show the

ADCs being driven by op amps for AC-coupled single-

ended, and DC-coupled differential applications.

Amplifiers such as the MAX4354/MAX4454 provide

high speed, high bandwidth, low noise, and low distor-

tion to maintain the input-signal integrity. Figure 10 can

also be used to interface with the DAC differential ana-

log outputs to provide gain or buffering. The DAC dif-

ferential analog outputs cannot be used in single-

ended mode because of the internally generated

1.4VDC common-mode level. Also, the DAC analog

outputs are designed to drive a differential input stage

with input impedance ≥70k. If single-ended outputs

are desired, use an amplifier to provide differential-to-

single-ended conversion and select an amplifier with

proper input common-mode voltage range.

FDD and TDD Modes

The MAX5866 can be used in diverse applications oper-

ating FDD or TDD modes. The MAX5866 operates in Xcvr

mode for FDD applications such as WCDMA3GPP (FDD)

and 4G technologies. Also, the MAX5866 can switch

between Tx and Rx modes for TDD applications like

TD-SCDMA, WCDMA-3GPP (TDD), IEEE 802.11a/b/g,

and IEEE 802.16.

In FDD mode, the ADC and DAC operate simultaneously.

The ADC bus and DAC bus are dedicated and must be

connected in 18-bit parallel (8-bit ADC and 10-bit DAC)

to the digital baseband processor. Select Xcvr mode

through the 3-wire serial interface and use the conversion

clock to latch data. In FDD mode, the MAX5866 uses

the ADC and DAC operating simultaneously.

In TDD mode, the ADC and DAC operate independent-

ly. The ADC and DAC bus are shared and can be con-

nected together, forming a single 10-bit parallel bus to

the digital baseband processor. Using the 3-wire serial

interface, select between Rx mode to enable the ADC

and Tx mode to enable the DAC. When operating in Rx

mode, the DAC does not transmit because the core is

disabled and in Tx mode, the ADC bus is tri-state. This

eliminates any unwanted spurious emissions and pre-

vents bus contention. In TDD mode, the MAX5866 uses

DAC uses 52.5mW in Tx mode.

Ultra-Low-Power, High-Dynamic-

Performance, 60Msps Analog Front End

Figure 9. Single-Ended Drive for ADCs

MAX5866

0.1F

1k

100

22pF

22pF

INB+

INB-

COM

INA+

INA-

0.1F

50

50

REFP

REFN

0.1F

1k